AD9434BCPZ-370 Analog Devices Inc, AD9434BCPZ-370 Datasheet - Page 11

• Manufacturer Part Number: AD9434BCPZ-370
• Description: IC ADC 12BIT 370MSPS 56LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9434BCPZ-370

• Sampling Rate: 370MSPS
• Input Channel Type: Differential, Single Ended
• Data Interface: Serial, SPI
• Supply Current: 260mA
• Digital Ic Case Style: LFCSP
• No. Of Pins: 56
• Rohs Compliant: Yes
• Resolution (bits): 12bit
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 8. Pin Function Descriptions—Double Data Rate Mode
Pin No.
0
30, 32 to 34, 37 to 39, 41
to 43, 46
7, 24, 47
8, 23, 48
35
36
40
44
45
31
25
26
27
29
49
50
51
52
53
54
55
56
1
2
3
4
5
Mnemonic
AGND
AVDD
DRVDD
DRGND
VIN+
VIN−
CML
CLK+
CLK−
VREF
SDIO
SCLK/DFS
CSB
PWDN
DCO−
DCO+
D0/D6−
D0/D6+
D1/D7−
D1/D7+
D2/D8−
D2/D8+
D3/D9−
D3/D9+
D4/D10−
D4/D10+
D5/D11−
1
1
Description
Analog Ground. The exposed paddle must be soldered to a ground plane.
1.8 V Analog Supply.
1.8 V Digital Output Supply.
Digital Output Ground.
Analog Input—True.
Analog Input—Complement.
Common-Mode Output. Enabled through the SPI, this pin provides a reference for the optimized
internal bias voltage for VIN+/VIN−.
Clock Input—True.
Clock Input—Complement.
Voltage Reference Internal/Input/Output. Nominally 0.75 V.
Serial Port Interface (SPI) Data Input/Output (Serial Port Mode).
Serial Port Interface Clock (Serial Port Mode)/Data Format Select (External Pin Mode).
Serial Port Chip Select (Active Low).
Chip Power-Down.
Data Clock Output—Complement.
Data Clock Output—True.
D0/D6 Complement Output (LSB).
D0/D6 True Output (LSB).
D1/D7 Complement Output.
D1/D7 True Output.
D2/D8 Complement Output.
D2/D8 True Output.
D3/D9 Complement Output.
D3/D9 True Output.
D4/D10 Complement Output.
D4/D10 True Output.
D5/D11 Complement Output (MSB).
D4/D10+
D5/D11+
D4/D10–
D5/D11–
NOTES
DRGND
DRVDD
D3/D9–
D3/D9+
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. AGND AND DRGND SHOULD BE TIED TO A COMMON
3. THE EXPOSED PADDLE MUST BE SOLDERED TO
DNC
DNC
DNC
DNC
OR–
OR+
QUIET GROUND PLANE.
A GROUND PLANE.
Figure 5. Pin Configuration—Double Data Rate Mode
10
11
12
13
14
1
2
3
4
5
6
7
8
9
PIN 0 (EXPOSED PADDLE) = AGND
PIN 1
INDICATOR
Rev. A | Page 11 of 28
(Not to Scale)
AD9434
TOP VIEW
42 AVDD
41 AVDD
40 CML
39 AVDD
38 AVDD
37 AVDD
36 VIN–
35 VIN+
34 AVDD
33 AVDD
32 AVDD
31 VREF
30 AVDD
29 PWDN
AD9434