ICS9LPRS436CKLF IDT, Integrated Device Technology Inc, ICS9LPRS436CKLF Datasheet - Page 12

• Manufacturer Part Number: ICS9LPRS436CKLF
• Description: IC CLK SYNTHESIZER 48VQFN
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of ICS9LPRS436CKLF

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1935

How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the beginning byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
IDT
ICS9LPRS436C
Low Power Clock for Intel Atom
Byte N + X -1
®
WR
T
P
Low Power Clock for Intel Atom
Beginning Byte N
Data Byte Count = X
Slave Address D2
Beginning Byte = N
Controller (Host)
Byte N + X - 1
Index Block Write Operation
General SMBus serial interface information for the ICS9LPRS436C
starT bit
stoP bit
WRite
(H)
®
ICS (Slave/Receiver)
-Based Systems
®
-Based Systems
ACK
ACK
ACK
ACK
ACK
(H)
12
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RD
RT
T
N
P
Slave Address D2
Slave Address D3
Beginning Byte = N
Controller (Host)
Index Block Read Operation
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(H)
(H)
.
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
1561A — 06/01/10
(H)
(H)
(H)