IDTCV152PVG IDT, Integrated Device Technology Inc, IDTCV152PVG Datasheet - Page 6

• Manufacturer Part Number: IDTCV152PVG
• Description: IC FLEXPC CLK PROGR P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV152PVG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV152PVG

BYTE 4
BYTE 5
BYTE 6
IDTCV152
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Bit
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Software PCI_STOP
CPUCLK0 Stop EN
CPUCLK1 Stop EN
CPUCLK2 Stop EN
CPUCLK3 Stop EN
Output(s) Affected
Output(s) Affected
Output(s) Affected
CPUT0, CPUC0
CPUT1, CPUC1
CPUT2, CPUC2
CPUT3, CPUC3
CPUCLK0
CPUCLK1
CPUCLK2
CPUCLK3
CPUCLK4
CPUCLK4
REFstr1
function
SRC
SRC
CPU
Stop Drive - Drive mode in Stop
Default: not affected by CPU_STOP
FSC latched value on power up
FSA latched value on power up
FSB latched value on power up
REF drive strength , work with
byte12 bit2, see strength table
CPU1 Pwrdwn drive mode
Only valid when Byte6 bit6
SRC Pwrdwn drive mode
Description / Function
PCI_STOP drive mode
Description / Function
Test Mode entry control
CPU0 Pwrdwn drive mode
CPU1 Pwrdwn drive mode
CPU2 Pwrdwn drive mode
CPU3 Pwrdwn drive mode
Description / Function
CPU_Stop control
Free-running control,
is HIGH
except PCIF[2:0] and SRC
6
clocks set to free running
Driven in power down
Driven in power down
Stop all PCI/F & SRC
Stop non-free running
Driven in PCI_Stop
Normal operation
CPU clocks
Driven in power down
Driven
Hi-Z
Free-running
0
0
0
Tristate in power down
Tristate in power down
Tristate in power down
Test mode, controlled
by byte 6 bit 7
REF/N mode
COMMERCIAL TEMPERATURE RANGE
Tri-state
No stop
power down
Stoppable
Tristate in
Run
1
1
1
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
Power On
Power On
Power On
FSA
FSB
FSC
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0