ICS9214DGLF IDT, Integrated Device Technology Inc, ICS9214DGLF Datasheet
ICS9214DGLF
Specifications of ICS9214DGLF
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ICS9214DGLF Summary of contents
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Integrated Circuit Systems, Inc. Rambus General Description The ICS9214 clock generator provides the necessary clock signals to support the Rambus XDR and Redwood logic interface. The clock source is a reference clock that may or may not be modulated for ...
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Integrated Circuit Systems, Inc. Pin Descriptions PIN # PIN NAME PIN TYPE 1 AVDD2.5 PWR 2 AGND PWR 3 IREFY 4 AGND PWR 5 CLK_INT 6 CLK_INC 7 VDD2.5 PWR 8 GND PWR 9 SMBCLK 10 SMBDAT ...
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Integrated Circuit Systems, Inc. General SMBus serial interface information for the ICS9214 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D8 • ICS clock will acknowledge • Controller (host) sends the ...
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Integrated Circuit Systems, Inc. SMB Table: Output Control Register Byte 0 Pin # - Test Mode Bit 7 - Bit 6 - Bit 5 - Bit 4 27,26 ODCLK_T/C0 Bit 3 24,23 ODCLK_T/C1 Bit 2 20,19 ODCLK_T/C2 Bit 1 17,16 ...
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Integrated Circuit Systems, Inc. PLL Multiplier Table 2 shows the frequency multipliers in the PLL, selectable by programming the MULT0, MULT1 and MULT2 bits in the SMBus Multiplier Control register. Power up default is 4. Table 2. PLL Multiplier Selection ...
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Integrated Circuit Systems, Inc. Operating Modes Table 4: Operating Modes Byte 0 Byte 1 BYPASS#/ OE PLL ...
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Integrated Circuit Systems, Inc. Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.0 V Logic Inputs ...
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Integrated Circuit Systems, Inc. DC Characteristics - Outputs TA = 0°C to +85°C; Supply Voltage AVDD2.5, VDD2.5 = 2.5 V +/- 0.125V (unless otherwise stated) SYMBOL PARAMETER t Power up latency State transition latency CO Differential output ...
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Integrated Circuit Systems, Inc. AC Characteristics-Inputs T = 0°C to +85°C; Supply Voltage AVDD2.5, VDD2.5 = 2.5 V +/- 0.125V (unless otherwise stated) A PARAMETER CLK_INT/CLK_INC cycle 1 time Cycle-to-Cycle Jitter Input clock duty cycle CLK_INT/CLK_INC rise and fall time ...
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Integrated Circuit Systems, Inc. AC Characteristics-Outputs T = 0°C to +85°C; Supply Voltage AVDD2.5, VDD2.5 = 2.5 V +/- 0.125V (unless otherwise stated SYMBOL PARAMETER t Output clock cycle time Short term jitter (over clock ...
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Integrated Circuit Systems, Inc. Clock Output Drivers Figure 2 shows the clock driver equivalent circuit. The differential driver produces a specified voltage swing on the channel by switching the currents going into ODCLK_T and ODCLK_C. The external resistor R current. ...
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Integrated Circuit Systems, Inc. Input Clock Signal The ICS9214 receives either a differential or single-ended reference clock (CLK_INT/C). When the reference input clock is from a differential clock source, it must meet the voltage levels and timing requirements listed in ...
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Integrated Circuit Systems, Inc. Power Sequencing Supply voltages for the ICS9214 must be applied before the same time and external input and output signals. ODCLK_T ODCLK_C 0809G—08/02/08 t CYCLE CYCLE, Figure 5. Cycle-to-cycle Jitter ...
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Integrated Circuit Systems, Inc. Phase Noise The 9214 meets the single side band phase noise spectral purity for offset frequencies between 1 MHz and 100 MHz as described by the equation: 10log[1+(50 x 106/f)2.4] -138 dBc/Hz This equation is shown ...
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Integrated Circuit Systems, Inc. Ordering Information ICS9214yG LF-T Example: ICS XXXX y G LF- T 0809G—08/02/08 4.40 mm. Body, 0.65 mm. Pitch TSSOP SYMBOL COMMON DIMENSIONS α aaa VARIATIONS ...
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Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description Updated SMBus table Byte 2, Bit 3 from:0 to:1. Updated PLL Multiplier Selection Table, from: Byte 1 to: Byte 0, and Bit 2,1,0, 0.1 3/30/2005 to: Bit 6,5,4. Updated Ordering ...