SI5319C-C-GM Silicon Laboratories Inc, SI5319C-C-GM Datasheet - Page 6

• Manufacturer Part Number: SI5319C-C-GM
• Description: IC CLOCK MULT/ATTENUATOR 36QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5319C-C-GM

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN Exposed Pad
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. DC Characteristics (Continued)
(V
Si5319
6
Common Mode Output
Voltage
Differential Output
Voltage
Common Mode Output
Voltage
Differential Output
Resistance
Output Voltage Low
Output Voltage High
Output Drive Current
(CMOS driving into
CKO
or CKO
high. CKOUT+ and
CKOUT– shorted
externally)
Notes:
DD
1.
2.
3. LVPECL outputs require nominal V
4. This is the amount of leakage that the 3-level inputs can tolerate from an external driver. See Si53xx Family
5. LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.
= 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, T
VOL
Parameter
Current draw is independent of supply voltage.
No under- or overshoot is allowed.
Reference Manual for more details.
VOH
for output low
for output
CKO
CKO
CKO
CKO
Symbol
CKO
CKO
CKO
VOHLH
VOLLH
VCM
VCM
RD
VD
IO
CML 100  load line-to-
100  load line-to-line
100  load line-to-line
LVDS 100 load line-
CML, LVPECL, LVDS
A
= –40 to 85 °C)
DD
Low Swing LVDS
ICMOS[1:0] =11
ICMOS[1:0] =10
ICMOS[1:0] =01
ICMOS[1:0] =00
ICMOS[1:0] =11
ICMOS[1:0] =10
ICMOS[1:0] =01
ICMOS[1:0] =00
Test Condition
V
V
V
V
V
V
V
V
V
≥ 2.5 V.
DD
DD
DD
DD
DD
DD
DD
DD
DD
CMOS
CMOS
to-line
LVDS
line
= 1.71 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
Rev. 1.0
0.8 x V
1.125
Min
500
350
—
—
—
—
—
—
—
—
—
—
—
DD
V
DD
1.75
Typ
700
425
200
1.2
7.5
5.5
3.5
32
24
16
—
—
– 0.36
8
1.275
Max
900
500
0.4
—
—
—
—
—
—
—
—
—
—
—
mV
mV
Unit
mA
mA
mA
mA
mA
mA
mA
mA

V
V
V
V
PP
PP