SI5368C-C-GQ Silicon Laboratories Inc, SI5368C-C-GQ Datasheet - Page 29

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SI5368C-C-GQ

Manufacturer Part Number
SI5368C-C-GQ
Description
IC CLK MULTIPLIER ATTEN 100TQFP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI5368C-C-GQ

Package / Case
100-TQFP, 100-VQFP
Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Frequency-max
*
Number Of Circuits
1
Maximum Input Frequency
710 MHz
Minimum Input Frequency
0.002 MHz
Output Frequency Range
0.002 MHz to 346 MHz
Supply Voltage (max)
2.75 V
Supply Voltage (min)
1.71 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5368C-C-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
SI5368C-C-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Reset value = 0100 0000
Register 11.
Name
Type
Bit
7:5
Bit
4
3
2
1
0
ALIGN_THR
Reserved
PD_CK4
PD_CK3
PD_CK2
PD_CK1
R/W
Name
D7
[2:0]
ALIGN_THR [2:0]
ALIGN_THR [2:0].
These bits control the threshold for the alignment error alarm. Input to output sync phase
skews that deviate more than the alignment threshold from the ideal value (set by
FSYNC_SKEW[16:0]) in either the leading or lagging direction trigger the alignmenta-
larm. Value is in units of Tclkout2.
000: 4
001: 8
010: 16
011: 32
100: 48
101: 64
110: 96
111: 128
Reserved.
PD_CK4.
This bit controls the powerdown of the CKIN4 input buffer.
0: CKIN4 enabled
1: CKIN4 disabled
PD_CK3.
This bit controls the powerdown of the CKIN3 input buffer.
0: CKIN3 enabled
1: CKIN3 disabled
PD_CK2.
This bit controls the powerdown of the CKIN2 input buffer.
0: CKIN2 enabled
1: CKIN2 disabled
PD_CK1.
This bit controls the powerdown of the CKIN1 input buffer.
0: CKIN1 enabled
1: CKIN1 disabled
R/W
D6
R/W
D5
Preliminary Rev. 0.41
Reserved
D4
R
PD_CK4
Function
R/W
D3
PD_CK3
R/W
D2
PD_CK2
R/W
D1
Si5368
PD_CK1
R/W
D0
29

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