NB7V585MMNR4G ON Semiconductor, NB7V585MMNR4G Datasheet

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NB7V585MMNR4G

Manufacturer Part Number
NB7V585MMNR4G
Description
IC CLK/DATA BUFFER/XLATOR 32-QFN
Manufacturer
ON Semiconductor
Series
GigaComm™r
Type
Fanout Buffer (Distribution), Multiplexer , Translator, Datar
Datasheet

Specifications of NB7V585MMNR4G

Number Of Circuits
1
Ratio - Input:output
2:6
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL
Output
CML
Frequency - Max
7GHz
Voltage - Supply
1.71 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TFQFN Exposed Pad
Frequency-max
7GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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NB7V585M
1.8V / 2.5V Differential 2:1
Mux Input to 1:6 CML
Clock/Data Fanout
Buffer/Translator
Multi−Level Inputs w/ Internal Termination
Description
distribution chip featuring a 2:1 Clock/Data input multiplexer with an
input select pin. The INx/INx inputs incorporate internal 50 W
termination resistors and will accept LVPECL, CML, or LVDS logic
levels (see Figure 9). The NB7V585M produces six identical output
copies of clock or data operating up to 6 GHz or 10 Gb/s, respectively.
As such, NB7V585M is ideal for SONET, GigE, Fiber Channel,
Backplane and other clock/data distribution applications. The 16 mA
differential CML output structure provides matching internal 50 W
source terminations, 400 mV output swings when externally
terminated with a 50 W resistor to V
optimized for low skew and minimal jitter. The NB7V585M is
powered with either 1.8 V or 2.5 V supply and is offered in a low
profile 5x5 mm 32−pin QFN package.
at www.onsemi.com.
performance clock products.
Features
© Semiconductor Components Industries, LLC, 2009
February, 2009 − Rev. 1
The NB7V585M is a differential 1−to−6 CML clock/data
Application notes, models, and support documentation are available
The NB7V585M is a member of the GigaComm™ family of high
Maximum Input Data Rate > 10 Gb/s
Data Dependent Jitter < 10 ps
Maximum Input Clock Frequency > 6 GHz
Random Clock Jitter < 0.8 ps RMS, Max
Low Skew 1:6 CML Outputs, 20 ps Max
2:1 Multi−Level Mux Inputs
175 ps Typical Propagation Delay
50 ps Typical Rise and Fall Times
Differential CML Outputs, 330 mV Peak−to−Peak, Typical
Operating Range: V
Internal 50 W Input Termination Resistors
V
QFN32 Package, 5 mm x 5 mm
−40°C to +85°C Ambient Operating Temperature
These are Pb−Free Devices
REFAC
Reference Output
CC
= 1.71 V to 1.89 V
CC
(see Figure 14) and is
1
*For additional marking information, refer to
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
V
V
Application Note AND8002/D.
REFAC0
REFAC1
GND
VT0
VT1
V
IN0
IN0
IN1
IN1
CC
1
SEL
SIMPLIFIED LOGIC DIAGRAM
32
A
WL
YY
WW
G
ORDERING INFORMATION
V
CC
http://onsemi.com
CASE 488AM
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
MN SUFFIX
QFN32
Publication Order Number:
0
1
1
DIAGRAM*
MARKING
AWLYYWW
NB7V585M/D
NB7V
585M
G
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
Q5
Q5

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NB7V585MMNR4G Summary of contents

Page 1

NB7V585M 1.8V / 2.5V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator Multi−Level Inputs w/ Internal Termination Description The NB7V585M is a differential 1−to−6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select ...

Page 2

IN0 1 VT0 2 3 VREFAC0 IN0 4 NB7V585M IN1 5 VT1 6 VREFAC1 7 IN1 Figure 1. 32−Lead QFN Pinout (Top View) Table 2. PIN DESCRIPTION ...

Page 3

Table 3. ATTRIBUTES ESD Protection Input Pullup Resistor (R Moisture Sensitivity (Note 3) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 3. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol Parameter ...

Page 4

Table 5. DC CHARACTERISTICS − CML OUTPUT Symbol Characteristic POWER SUPPLY CURRENT I Power Supply Current (Inputs and Outputs Open) CC CML OUTPUTS (Note 6) V Output HIGH Voltage OH V Output LOW Voltage OL DIFFERENTIAL INPUTS DRIVEN SINGLE−ENDED (Note ...

Page 5

Table 6. AC CHARACTERISTICS V Symbol f Maximum Input Clock Frequency, V MAX f Maximum Operating Input Data Rate (PRBS23) DATAMAX V Output Voltage Amplitude (See Figures 4, Note 15) OUTPP Propagation Delay to Output Differential @ ...

Page 6

− IHD(IN) ILD(IN)| INx V IHD INx V ILD Figure 4. Differential Inputs Driven Differentially INx V th INx V th Figure 6. Differential Input Driven Single−Ended IHmax thmax V ILmax ...

Page 7

... CML Driver GND Figure 13. Standard 50 W Load CML Interface ORDERING INFORMATION Device NB7V585MMNG NB7V585MMNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ NB7V585M LVDS Driver GND GND ...

Page 8

... X 0.28 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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