MC100EP809FAG ON Semiconductor, MC100EP809FAG Datasheet

no-image

MC100EP809FAG

Manufacturer Part Number
MC100EP809FAG
Description
IC DRVR CLK PECL-HSTL 1:9 32LQFP
Manufacturer
ON Semiconductor
Series
100EPr
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of MC100EP809FAG

Number Of Circuits
2
Ratio - Input:output
1:9
Differential - Input:output
Yes/Yes
Input
HSTL, LVDS, LVPECL
Output
HSTL
Frequency - Max
750MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
750MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC100EP809FAGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100EP809FAG
Manufacturer:
ON Semiconductor
Quantity:
76
Part Number:
MC100EP809FAG
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
MC100EP809FAG
Manufacturer:
ON/安森美
Quantity:
20 000
MC100EP809
3.3V 1:9 Differential
HSTL/PECL/LVDS to HSTL
Clock Driver with LVTTL
Clock Select and Enable
Description
designed with clock distribution in mind, accepting two clock sources
into an input multiplexer. The part is designed for use in low voltage
applications which require a large number of outputs to drive precisely
aligned low skew signals to their destination. The two clock inputs are
one differential HSTL and one differential LVPECL. Both input pairs
can accept LVDS levels. They are selected by the CLK_SEL pin
which is LVTTL. To avoid generation of a runt clock pulse when the
device is enabled/disabled, the Output Enable (OE), which is LVTTL,
is synchronous ensuring the outputs will only be enabled/disabled
when they are already in LOW state (Figure 9).
optimal design, layout, and processing minimize skew within a device
and from lot to lot. The MC100EP809 output structure uses open
emitter architecture and will be terminated with 50 W to ground
instead of a standard HSTL configuration (Figure 7). To ensure the
tight skew specification is realized, both sides of the differential output
need to be terminated identically into 50 W even if only one output is
being used. If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
distribute low skew clocks across the backplane of the board. Both
clock inputs may be single−end driven by biasing the non−driven pin
in an input pair (Figure 8).
Features
© Semiconductor Components Industries, LLC, 2008
May, 2008 − Rev. 9
The MC100EP809 is a low skew 1−to−9 differential clock driver,
The MC100EP809 guarantees low output−to−output skew. The
Designers can take advantage of the EP809’s performance to
Offset Voltage
with GND = 0 V, V
100 ps Typical Device−to−Device Skew
15 ps Typical within Device Skew
HSTL Compatible Outputs Drive 50 W to GND with no
Maximum Frequency > 750 MHz
850 ps Typical Propagation Delay
Fully Compatible with Micrel SY89809L
PECL and HSTL Mode Operating Range: V
Open Input Default State
Pb−Free Packages are Available
CCO
= 1.6 V to 2.0 V
CCI
= 3 V to 3.6 V
1
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
32−LEAD LQFP
*For additional marking information, refer to
CASE 488AM
Application Note AND8002/D.
MN SUFFIX
A
WL
YY
WW
G or G
(Note: Microdot may be in either location)
CASE 873A
FA SUFFIX
QFN32
1
ORDERING INFORMATION
32
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
http://onsemi.com
Publication Order Number:
32
1
DIAGRAMS*
1
AWLYYWWG
MARKING
MC100EP809/D
AWLYYWWG
MC100
EP809
MC100
EP809
G

Related parts for MC100EP809FAG

MC100EP809FAG Summary of contents

Page 1

MC100EP809 3.3V 1:9 Differential HSTL/PECL/LVDS to HSTL Clock Driver with LVTTL Clock Select and Enable Description The MC100EP809 is a low skew 1−to−9 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ...

Page 2

V CCI HSTL_CLK HSTL_CLK CLK_SEL MC100EP809 LVPECL_CLK LVPECL_CLK GND OE All and GND pins must be externally connected to CCI CCO appropriate Power Supply to guarantee proper operation (V Figure 1. 32−Lead LQFP Pinout (Top View) ...

Page 3

Table 1. PIN DESCRIPTION PIN FUNCTION HSTL_CLK*, HSTL or LVDS Differential Inputs HSTL_CLK** LVPECL_CLK*, LVPECL or LVDS Differential Inputs LVPECL_CLK** CLK_SEL** LVCMOS/LVTTL Input CLK Select OE** LVCMOS/LVTTL Output Enable Q0 − Q8, HSTL Differential Outputs Q0 − Positive ...

Page 4

Table 4. MAXIMUM RATINGS Symbol Parameter V Core Power Supply CC1 V HSTL Output Power Supply CC0 V Input Voltage I I Output Current out T Operating Temperature Range A T Storage Temperature Range stg Thermal Resistance (Junction−to−Ambient ...

Page 5

Table 6. LVTTL/LVCMOS DC CHARACTERISTICS Symbol Characteristic V Input HIGH Voltage IH V Input LOW Voltage IL I Input HIGH Current IH I Input LOW Current IL NOTE: Device will meet the specifications after thermal equilibrium has been established when ...

Page 6

Table 8. AC CHARACTERISTICS V CCI Symbol Characteristic V Differential Output Voltage f Opp out (Figure 4) f out f out t Propagation Delay (Differential Configura- PLH t tion) LVPECL_CLK to Q PHL HSTL_CLK Within−Device Skew (Note ...

Page 7

V V IHCMR PP Figure 5. LVPECL Differential Input Levels HSTL OUTPUT Q Figure 7. HSTL Output Termination and AC Test Reference *Must be CLK/CLK common mode voltage: ((V Figure 8. Single−Ended CLK/CLK Input Configuration CLK CLK ...

Page 8

... ORDERING INFORMATION Device MC100EP809FA MC100EP809FAG MC100EP809FAR2 MC100EP809FAR2G MC100EP809MNG MC100EP809MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D − ...

Page 9

−T− DETAIL −Z− −AB− −AC− SEATING PLANE 0.10 (0.004) AC PACKAGE DIMENSIONS 32 LEAD LQFP CASE 873A−02 ISSUE C 4X 0.20 (0.008) AB T-U Z −U− ...

Page 10

... X 0.28 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

Related keywords