MK2059-01SITR IDT, Integrated Device Technology Inc, MK2059-01SITR Datasheet - Page 9

• Manufacturer Part Number: MK2059-01SITR
• Description: IC VCXO CLK JITTER ATTEN 20-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Frequency Translatorr

Specifications of MK2059-01SITR

• Pll: Yes
• Input: Clock
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: No/No
• Frequency - Max: 25.92MHz
• Divider/multiplier: No/Yes
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC
• Frequency-max: 24.704MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AC Electrical Characteristics
IDT™ VCXO-BASED FRAME CLOCK FREQUENCY TRANSLATOR
MK2059-01
VCXO-BASED FRAME CLOCK FREQUENCY TRANSLATOR
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85 C
Note 1: Minimum high or low time of input clock.
Note 2: For the 1.544MHz and 2.048MHz output selections, the input to output clock skew is not controlled nor
predictable and will change between power up cycles. Because it is dependent on the phase relationship between
the output and feedback divider states following power up, the input to output clock skew will remain stable during a
given power up cycle. If controlled input to output skew is desired for this output clock frequency please refer to the
MK2049 or MK2069 products.
Note 3: Input reference is the 8 kHz output from a Mitel/Zarlink MT9045 device in freerun mode
(SEL2:0 = 100, 19.44 MHz external crystal).
VCXO Crystal Pull Range
VCXO Crystal Nominal
Frequency
Input Jitter Tolerance
Input pulse width (1)
Output Frequency Error
Output Duty Cycle (% high
time)
Output Rise Time
Output Fall Time
Skew, Input to Output Clock
Note 2
Cycle Jitter (short term jitter)
Timing Jitter, Filtered
500Hz-1.3MHz (OC-3)
Timing Jitter, Filtered
65kHz-1.3MHz (OC-3)
Parameter
Symbol
F
t
t
f
t
t
OUT
t
OD
OR
t
XP
f
OF
t
t
t
IO
pi
ja
X
ji
jf
jf
Using Recommended
Crystal
In reference to input
clock period
ICLK = 0 ppm error
Measured at VDD/2,
C
0.8 to 2.0V, C
2.0 to 0.8V, C
All output clock
selections except 1.544
and 2.048 MHz
Referenced to
Mitel/Zarlink MT9045,
Note 3
Referenced to
Mitel/Zarlink MT9045,
Note 3
L
=15pF
Conditions
9
L
L
=15pF
=15pF
Min.
-115
13.5
10
40
-5
0
Typ. Max. Units
150
227
170
0
VCXO AND SYNTHESIZER
MK2059-01
+115
0.4
1.5
1.5
27
60
+5
0
ps p-p
ps p-p
ps p-p
MHz
ppm
ppm
UI
ns
ns
ns
ns
%
REV H 051310