ICS813252CKI-02LF IDT, Integrated Device Technology Inc, ICS813252CKI-02LF Datasheet
ICS813252CKI-02LF
Specifications of ICS813252CKI-02LF
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ICS813252CKI-02LF Summary of contents
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... 32-Lead VFQFN 5mm x 5mm x 0.925 package body K Package Top View ICS813252CKI-02 REVISION A AUGUST 25, 2010 F EATURES • Two LVPECL outputs Each output supports independent frequency selection at 25MHz, 125MHz, 156.25MHz and 312.5MHz • Two differential inputs support the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL • ...
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... CLK1 1 011 = 2430 nCLK1 100 = 3125 101 = 9720 Pulldown CLK_SEL 110 = 15625 111 = 19440 (default) ICS813252CKI-02 REVISION A AUGUST 25, 2010 Loop Filter 25MHz Phase Detector VCXO Charge Pump VCXO Feedback Divider ÷3125 VCXO Jitter Attenuation PLL 2 VCXO JITTER ATTENUATOR & FEMTOCLOCK ...
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... ICS813252I-02 Data Sheet ABLE IN ESCRIPTIONS ABLE IN HARACTERISTICS ICS813252CKI-02 REVISION A AUGUST 25, 2010 VCXO JITTER ATTENUATOR & FEMTOCLOCK ©2010 Integrated Device Technology, Inc. ® MULTIPLIER kΩ kΩ ...
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... ICS813252I-02 Data Sheet T 3A ABLE RE IVIDER UNCTION ICS813252CKI-02 REVISION A AUGUST 25, 2010 T ABLE ABLE VCXO JITTER ATTENUATOR & FEMTOCLOCK 3B UTPUT IVIDER UNCTION ABLE ©2010 Integrated Device Technology, Inc. ® MULTIPLIER ...
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... ICS813252I-02 Data Sheet T 3C ABLE REQUENCY UNCTION ABLE ICS813252CKI-02 REVISION A AUGUST 25, 2010 VCXO JITTER ATTENUATOR & FEMTOCLOCK ©2010 Integrated Device Technology, Inc. ® MULTIPLIER ...
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... ICS813252CKI-02 REVISION A AUGUST 25, 2010 4.6V NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional op eration of product at these conditions or any conditions beyond -0. 0.5V CC those listed in the DC Characteristics or AC Characteristics is not implied ...
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... IFFERENTIAL HARACTERISTICS 4D. LVPECL DC C ABLE HARACTERISTICS ABLE HARACTERISTICS Ø ICS813252CKI-02 REVISION A AUGUST 25, 2010 , 3.3V±5 CCO CCX 3.3V±5 CCO CCX Ω 3.3V±5 0V, T CCO CCX – VCXO JITTER ATTENUATOR & FEMTOCLOCK = 0V -40°C 85° 0V -40°C 85° -40°C 85° ...
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... ICS813252I-02 Data Sheet ICS813252CKI-02 REVISION A AUGUST 25, 2010 125MH YPICAL HASE OISE O F FFSET REQUENCY 8 VCXO JITTER ATTENUATOR & FEMTOCLOCK Z RMS Phase Jitter (Random) 10kHz to 20MHz = 0.98ps (typical ©2010 Integrated Device Technology, Inc. ® MULTIPLIER 125MHz ...
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... IRCUIT Phase Noise Plot Offset Frequency f 1 RMS Jitter = Area Under Offset Frequency Markers P J HASE ITTER nQA, nQB 80% 20% QA UTPUT ISE ALL IME ICS813252CKI-02 REVISION A AUGUST 25, 2010 M EASUREMENT V CC SCOPE Qx nCLK0, nCLK1 CLK0, CLK1 nQx IFFERENTIAL nFOUTx FOUTx nFOUTy FOUTy ...
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... In addition, matched termination at the input will attenuate the signal in half. This can be done in one of two ways. First, R3 and R4 in parallel should equal the transmission line ICS813252CKI-02 REVISION A AUGUST 25, 2010 A I PPLICATION NFORMATION ...
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... CLK/nCLK I D IGURE NPUT RIVEN BY A 3.3V HCSL D RIVER ICS813252CKI-02 REVISION A AUGUST 25, 2010 consult with the vendor of the driver component to confirm the must meet the V and driver termination requirements. For example in Figure 3A, the OH PP input termination applies for IDT open emitter LVHSTL drivers. If you are using an LVHSTL driver from another vendor, use their termination recommendation ...
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... INS All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1kΩ resistor can be used. ICS813252CKI-02 REVISION A AUGUST 25, 2010 P ATH are application specific and dependent upon the package power dissipation as well as electrical conductivity requirements. Thus, thermal and electrical analysis and/or testing are recommended to determine the minimum number needed ...
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... 5A. LVPECL O IGURE UTPUT ICS813252CKI-02 REVISION A AUGUST 25, 2010 UTPUTS 50Ω transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 5A and 5B show two different layouts which are recommended only as guidelines. Other suitable clock lay- outs may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations ...
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... RU1 1K To Logic Input pins RD1 Not Install ICS813252CKI-02 REVISION A AUGUST 25, 2010 can also be used for additional spur reduction recommended that the loop filter components be laid out for CC the 3-pole option. This will also allow the 2-pole filter to be used. VCC ...
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... C ICS813252CKI-02 REVISION A AUGUST 25, 2010 the crystal specification. In either case, the absolute tuning range is reduced. The correct value of C characteristics of the VCXO. The recommended C Parameter Table balances the tuning range by centering the tuning curve. The VCXO-PLL Loop Bandwidth Selection Table shows R and C bandwidth configurations ...
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... This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer). θ θ θ θ θ ABLE HERMAL ESISTANCE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards ICS813252CKI-02 REVISION A AUGUST 25, 2010 P C OWER ONSIDERATIONS = 3. 3.465V, which gives worst case results 3.465V * 235mA = 814.275mW * Pd_total + ...
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... OH_MAX CCO_MAX L [(2V – 0.9V)/50Ω] * 0.9V = 19.8mW Pd_L = [(V – 2V))/ OL_MAX CCO_MAX L [(2V – 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW ICS813252CKI-02 REVISION A AUGUST 25, 2010 LVPECL D C IGURE RIVER IRCUIT AND = V – 0.9V CCO_MAX – 1.7V CCO_MAX – ...
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... ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS813252I-02 is: 6579 ICS813252CKI-02 REVISION A AUGUST 25, 2010 R I ELIABILITY NFORMATION 32 L VFQFN EAD θ θ θ θ θ vs. 0 Air Flow (Meters per Second VCXO JITTER ATTENUATOR & ...
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... VFQFN package. This drawing is not intended to convey the actual pin count or pin layout of this device. The pin count and pinout are shown on the front page. The package dimensions are in Table 8. ICS813252CKI-02 REVISION A AUGUST 25, 2010 32 L VFQFN UFFIX FOR ...
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... Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS813252CKI-02 REVISION A AUGUST 25, 2010 a ...
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... ICS813252I-02 Data Sheet ICS813252CKI-02 REVISION A AUGUST 25, 2010 " & " " VCXO JITTER ATTENUATOR & FEMTOCLOCK " ©2010 Integrated Device Technology, Inc. ® MULTIPLIER ...
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ICS813252I-02 Data Sheet www.IDT.com 6024 Silver Creek Valley Road Sales San Jose, CA 95138 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or ...