SI5325A-C-GM Silicon Laboratories Inc, SI5325A-C-GM Datasheet - Page 31

IC UP-PROG CLK MULTIPLIER 36-QFN

SI5325A-C-GM

Manufacturer Part Number
SI5325A-C-GM
Description
IC UP-PROG CLK MULTIPLIER 36-QFN
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet

Specifications of SI5325A-C-GM

Number Of Circuits
1
Package / Case
36-QFN
Pll
Yes
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
1.4GHz
Divider/multiplier
Yes/Yes
Voltage - Supply
1.71 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
1.4GHz
Maximum Input Frequency
710 MHz
Minimum Input Frequency
10 MHz
Output Frequency Range
10 MHz to 1417 MHz
Supply Voltage (max)
3.63 V
Supply Voltage (min)
1.71 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reset value = 0011 0001
Reset value = 1100 0000
Register 36.
Register 40.
Name
Name
Type
Type
Bit
Bit
7:0
7:4
3:0
Bit
Bit
N2_LS [19:16] N2_LS [19:16].
NC2_LS [7:0] NC2_LS [7:0].
Reserved
Name
Name
D7
D7
Sets value for NC2 low-speed divider, which drives CKOUT2 output. Must be 0 or odd.
00000000000000000000 = 1
00000000000000000001 = 2
00000000000000000011 = 4
00000000000000000101 = 6
...
11111111111111111111=2^20
Valid divider values=[1, 2, 4, 6, ..., 2^20]
Reserved.
Sets the value for the N2 low-speed divider, which drives the phase detector.
Must be an even number ranging from 32 to 512 (inclusive).
00000000000000100000 = 32
00000000000000100010 = 34
00000000000000100100 = 36
...
00000000001000000000 = 512
Valid divider values = [32, 34, 36...512]
D6
D6
Reserved
R
D5
D5
Preliminary Rev. 0.4
D4
D4
NC2_LS [7:0]
R/W
Function
Function
D3
D3
D2
D2
N2_LS [19:16]
R/W
D1
D1
Si5325
D0
D0
31

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