CS5530-ISZ Cirrus Logic Inc, CS5530-ISZ Datasheet - Page 3

• Manufacturer Part Number: CS5530-ISZ
• Description: IC ADC 24BIT 1CH W/LNA 20SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5530-ISZ

• Number Of Converters: 1
• Package / Case: 20-SSOP
• Number Of Bits: 24
• Sampling Rate (per Second): 3.84k
• Data Interface: Serial
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Architecture: Delta-Sigma
• Conversion Rate: 6.25 SPs to 3840 SPs
• Resolution: 24 bit
• Input Type: Voltage
• Interface Type: Serial (3-Wire)
• Voltage Reference: 2.5 V
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1158 - BOARD EVAL FOR CS5530
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1283-5

CS5530
LIST OF FIGURES
Figure 1. SDI Write Timing (Not to Scale)............................................................................... 10
Figure 2. SDO Read Timing (Not to Scale)............................................................................. 10
Figure 3. Front End Configuration........................................................................................... 11
Figure 4. Input Model for AIN+ and AIN- Pins......................................................................... 11
Figure 5. Measured Voltage Noise Density............................................................................. 12
Figure 5. Measured Voltage Noise Density............................................................................. 12
Figure 6. CS5530 Register Diagram ....................................................................................... 13
Figure 7. Command and Data Word Timing ........................................................................... 16
Figure 8. Input Reference Model when VRS = 1 .................................................................... 18
Figure 9. Input Reference Model when VRS = 0 .................................................................... 18
Figure 10. System Calibration of Offset .................................................................................. 22
Figure 11. System Calibration of Gain .................................................................................... 22
Figure 12. Synchronizing Multiple ADCs................................................................................. 25
Figure 13. Digital Filter Response (Word Rate = 60 Sps) ....................................................... 27
Figure 14. 120 Sps Filter Magnitude Plot to 120 Hz ............................................................... 27
Figure 15. 120 Sps Filter Phase Plot to 120 Hz ...................................................................... 27
Figure 16. Z-Transforms of Digital Filters................................................................................ 27
Figure 17. On-chip Oscillator Model........................................................................................ 28
Figure 18. CS5530 Configured with a Single +5 V Supply ..................................................... 29
Figure 19. CS5530 Configured with ±2.5 V Analog Supplies.................................................. 29
Figure 20. CS5530 Configured with ±3 V Analog Supplies..................................................... 30
LIST OF TABLES
Table 1. Conversion Timing for Single Mode .......................................................................... 24
Table 2. Conversion Timing for Continuous Mode.................................................................. 24
Table 3. Output Coding ........................................................................................................... 25
DS742F3
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