TC7109CPL Microchip Technology, TC7109CPL Datasheet - Page 17

IC ADC 12BIT HANDSHAKE 40DIP

TC7109CPL

Manufacturer Part Number
TC7109CPL
Description
IC ADC 12BIT HANDSHAKE 40DIP
Manufacturer
Microchip Technology
Datasheets

Specifications of TC7109CPL

Number Of Converters
1
Package / Case
40-DIP (0.600", 15.24mm)
Number Of Bits
12
Data Interface
Serial, Parallel
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Architecture
Dual Slope
Conversion Rate
0.01 KSPs
Resolution
12 bit
Input Type
Voltage
Maximum Power Dissipation
1230 mW
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
158-1059
158-1059

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4.0
4.1
Combinations of chip enable and byte enable control
signals, which may be used when interfacing the
TC7109A to parallel data lines, are shown in Figure .
The CE/LOAD input may be tied low, allowing either byte
to be controlled by its own enable (see Figure (A)).
Figure (B) shows the HBEN and LBEN as flag inputs,
and CE/LOAD as a master enable, which could be the
READ strobe available from most microprocessors.
Figure (C) shows a configuration where the two byte
enables are connected together. The CE/LOAD is a
chip enable, and the HBEN and LBEN may be used as
a second chip enable, or connected to ground. The 14
data outputs will be enabled at the same time. In the
direct MODE, SEND should be tied to V+.
Figure shows interfacing several TC7109A’s to a bus,
ganging the HBEN and LBEN signals to several
converters together, and using the CE/LOAD input to
select the desired converter.
FIGURE 4-1:
© 2006 Microchip Technology Inc.
A.
Analog In
GND
INTERFACING
Direct Mode
MODE
HBEN
TC7109A
Control
RUN/HOLD
CE/LOAD
POL, OR
B
Direct Mode Chip and Byte Enable Combination
LBEN
B
9
1
- B
- B
12
8
Convert
6
8
Chip Select 2
B.
Analog In
GND or
GND
MODE
HBEN
TC7109A
RUN/HOLD
Chip Select 1
CE/LOAD
POL, OR
B
LBEN
1
- B
Figure through Figure give practical circuits utilizing
the parallel three-state output capabilities of the
TC7109A. Figure shows parallel interface to the 8748/
49 systems via an 8255 PPI, where the TC7109A data
outputs are active at all times. This interface can be
used in a read-after-update sequence, as shown in
Figure . The data is accessed by the high-to-low
transition of the Status driving an interrupt to the
microcontroller.
The RUN/HOLD input is also used to initiate
conversions under software control.
Direct interfacing to most microcontroller busses is
easily accomplished through the three-state output of
the TC7109A.
Figure 4-8 is a typical connection diagram. To ensure
requirements for setup and hold times, minimum pulse
widths, and the drive limitations on long busses are
met, it is necessary to carefully consider the system
timing in this type of interface. This type of interface is
used when the memory peripheral address density is
low, providing simple address decoding. Interrupt
handling can be simplified by using an interface to
reduce the component count.
12
14
Convert
C.
Analog In
GND
MODE
HBEN
TC7109A
Byte Flags
TC7109/A
RUN/HOLD
CE/LOAD
Chip Select
POL, OR
B
LBEN
B
9
DS21456C-page 17
1
- B
- B
12
8
Convert
6
8

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