LTC1272-3ACSW Linear Technology, LTC1272-3ACSW Datasheet
LTC1272-3ACSW
Specifications of LTC1272-3ACSW
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LTC1272-3ACSW Summary of contents
Page 1
... The LTC1272 operates with a single 5V supply but can also accept the 5V/–15V supplies required by the AD7572 (Pin 23, the negative supply pin of the AD7572, is not connected on the LTC1272). The LTC1272 has the same input range as the AD7572 but, to achieve single supply opera- tion, it provides a 2.42V reference output instead of the – ...
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... LTC1272-XA MIN TYP ● 12 ● ● ● ● ORDER PART NUMBER CONVERSION CONVERSION TIME = 3µs TIME = 8µs LTC1272-3ACN LTC1272-8ACN LTC1272-8CCN LTC1272-3CCN SW PACKAGE ONLY LTC1272-3ACSW LTC1272-8ACSW LTC1272-3CCSW LTC1272-8CCSW LTC1272-XC MAX MIN TYP MAX 12 ±1/2 ±1 ±1 ±1 ±3 ±4 ±4 ±6 ±10 ± ...
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... OUT OUT (Note 250kHz (LTC1272-3), 166kHz (LTC1272-5), 111kHz (LTC1272-8) SAMPLE CONDITIONS 10kHz Input Signal 10kHz Input Signal 10kHz Input Signal denotes the specifications which apply over the full operating temperature range, otherwise CONDITIONS 4.75V ≤ V ≤ 5.25V DD LTC1272 denotes the specifications which apply over the full ...
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... Note 5: Linearity error is specified between the actual end points of the A/D transfer curve. Note 6: The LTC1272 has the same input range as the AD7572 but, to achieve single supply operation, it provides a 2.42V reference output instead of the –5.25V of the AD7572. This requires that the polarity of the reference bypass capacitor be reversed when plugging an LTC1272 into an AD7572 socket ...
Page 5
... CS (Pin 21): The Chip Select Input must be low for the ADC to recognize RD and HBEN inputs. BUSY (Pin 22): The BUSY Output is low when a conver- sion is in progress. NC (Pin 23): Not Connected Internally. The LTC1272 does not require negative supply. This pin can accommodate the –15V required by the AD7572 without problems. V (Pin 24): Positive Supply, 5V ...
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... TEMPERATURE (°C) LT1272 • TPC04 LT1272 • TPC06 *EFFECTIVE NUMBER OF BITS, ENOBs = 3584 4096 LTC1272 • TPC02 Maximum Clock Frequency vs Temperature – 55 – 100 125 TEMPERATURE (°C) LTC1272 ENOBs* vs Frequency 250kHz 100 120 f (kHz) IN LT1272 • TPC07 S/( – 1.76dB 6.02 ...
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... IN capacitor through a 300Ω/2.7kΩ divider. The voltage divider allows the LTC1272 to convert input signals while operating from a 4.5V supply. The conver- sion has two phases: the sample phase and the convert phase. During the sample phase, the comparator offset is ...
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... (kHz) IN Figure 3. LTC1272 Effective Number of Bits (ENOBs) vs Input Frequency 250kHz –0.5 –1.0 Figure 4. LTC1272 Dynamic DNL Total Harmonic Distortion Total Harmonic Distortion (THD) is the ratio of the RMS sum of all harmonics of the input signal to the fundamental itself. The harmonics are limited to the frequency band between DC and one half the sampling frequency ...
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... CLK IN may be near RD’s falling edge. Driving the Analog Input The analog input of the LTC1272 is much easier to drive than that of the AD7572. The input current is not modu- lated by the DAC as in the AD7572. It has only one small current spike from charging the sample-and-hold capaci- tor at the end of the conversion ...
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... Figure 8. LTC1272 Internal 2.42V Reference Unipolar Operation Figure 9 shows the ideal input/output characteristic for the input range of the LTC1272. The code transitions occur midway between successive integer LSB values (i.e., 1/2LSB, 3/2LSBs, 5/2LSBs . . . FS – 3/2LSBs). The output code is natural binary with 1 LSB = FS/4096 = (5/4096 ...
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... A single point analog ground separate from the logic system ground should be established with an analog ground plane at pin 3 (AGND close as possible to the LTC1272, as shown in Figure 11. Pin 12 (LTC1272 DGND) and all other analog grounds should be connected to this single analog ground point. No other digital grounds should be connected to this analog ground point ...
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... Figure 12. Internal Logic for Control Inputs CS, RD and HBEN CS & RD BUSY CLK IN UNCERTAIN CONVERSION TIME FOR 30ns < THE LTC1272 IS ALSO COMPATIBLE WITH THE AD7572 SYNCHRONIZATION MODES. SEE “DIGITAL INTERFACE” TEXT. Table 1. Data Bus Output, CS and RD = Low PIN 4 PIN 5 PIN 6 Data Outputs* ...
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... Slow Memory Mode, Parallel Read (HBEN = Low) Figure 14 and Table 2 show the timing diagram and data bus status for Slow Memory Mode, Parallel Read. CS and RD going low triggers a conversion and the LTC1272 acknowledges by taking BUSY low. Data from the previous conversion appears on the three-state data outputs. BUSY ...
Page 14
... LTC1272 • TA17 D3/11 D2/10 D1/9 DB3 DB2 DB1 DB11 DB10 DB9 CONV t 7 NEW DATA DB11-DB0 t 12 LTC1272 • TA18 D5 D4 D3/11 D2/10 D1/9 DB5 DB4 DB3 DB2 DB1 DB5 DB4 DB3 DB2 DB1 D0/8 DB0 DB8 D0/8 DB0 DB0 ...
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... MC68000 Microprocessor Figure 18 shows a typical interface for the MC68000. The LTC1272 is operating in the Slow Memory Mode. Assum- ing the LTC1272 is located at address C000, then the following single 16-bit Move instruction both starts a conversion and reads the conversion result: Move.W $C000,D0 ...
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... A0 is used to assert HBEN, so that an even address (HBEN = LOW) to the LTC1272 will start a conversion and read the low data byte. An odd address (HBEN = HIGH) will read the high data byte. This ...
Page 17
... V and can be removed, or, because there is no internal connection to pin 23, it can remain unmodified. The clock can be considered synchronous with CS and RD in cases where the LTC1272 CLK IN signal is derived from the same clock as the microprocessor reading the LTC1272. LTC1272 ANALOG INPUT ...
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... LINES D9 HBEN D8 CLK OUT D7 CLK IN** D6 D0/8 * THE LTC1272 HAS THE SAME INPUT RANGE BUT PROVIDES A 2.42V D5 D1/9 REFERENCE OUTPUT AS OPPOSED TO THE –5.25V OF THE AD7572. FOR PROPER OPERATION, REVERSE THE REFERENCE CAPACITOR POLARITY AND SHORT OUT THE Ω D4 D2/10 10 RESISTOR. ** THE ADC CLOCK SHOULD BE SYNCHRONIZED TO THE CONVERSION START ...
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... P DATA BUS * THE LTC1272 HAS THE SAME INPUT RANGE BUT PROVIDES A 2.42V REFERENCE OUTPUT AS OPPOSED TO THE –5.25V OF THE AD7572. FOR PROPER OPERATION, REVERSE THE REFERENCE CAPACITOR POLARITY AND SHORT OUT THE Ω 10 RESISTOR. ** THE D FLIP-FLOP SYNCHRONIZES THE CONVERSION START SIGNAL ( THE ...
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... LTC1272 PACKAGE DESCRIPTIO .300 – .325 (7.620 – 8.255) .008 – .015 (0.203 – 0.381) +.035 .325 –.015 ( ) +0.889 8.255 –0.381 NOTE: INCHES 1. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) .030 ± ...