AD9233BCPZ-125 Analog Devices Inc, AD9233BCPZ-125 Datasheet
AD9233BCPZ-125
Specifications of AD9233BCPZ-125
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AD9233BCPZ-125 Summary of contents
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FEATURES 1.8 V analog supply operation 1 3.3 V output supply SNR = 69.5 dBc (70.5 dBFS MHz input SFDR = 85 dBc to 70 MHz input Low power: 395 mW @ 125 MSPS Differential input ...
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AD9233 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 3 Specifications..................................................................................... 4 DC Specifications ......................................................................... 4 AC Specifications.......................................................................... 5 Digital Specifications ................................................................... 6 Switching ...
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REVISION HISTORY 8/06—Rev Rev. A Updated Format.................................................................. Universal Added 80 MSPS .................................................................. Universal Deleted Figure 19, Figure 20, Figure 22, and Figure 23; Renumbered Sequentially ..............................................................11 Deleted Figure 24, Figure 25, and Figure 27 to Figure 29; Renumbered ...
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... Full 138 155 Full 7 Full 12 Full 248 279 Full 261 Full 288 Full 40 Full 1.8 Rev Page AD9233BCPZ-125 Typ Max Min Typ Max 12 Guaranteed Guaranteed ±0.3 ±0.8 ±0.3 ±0.8 ±0.2 ±4.9 ±0.2 ±3.9 ±0.5 ±0.5 ±0.2 ±0.2 ±1.2 ± ...
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... Full −85.0 25°C −90.0 25°C −90.0 25°C 87 25°C 83 25°C 650 Rev Page AD9233 AD9233BCPZ-125 Typ Max Min Typ Max 69.5 69.5 69.5 69.5 68.3 69.4 69.4 68.9 68.9 69.2 69.2 69.2 69.2 67.3 69 ...
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... Full Full Full Full Full Full Full Full = 50 μA) Full = 0.5 mA) Full Full Full = 50 μA) Full = 0.5 mA) Full Full Full Rev Page AD9233BCPZ-80/105/125 Min Typ Max CMOS/LVDS/LVPECL 1.2 0.2 6 AVDD − 0.3 AVDD + 1.6 1.1 AVDD 1.2 3.6 0 0.8 −10 +10 −10 +10 8 ...
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... Full 2 Full 5 Full CLK – – – – – DCO Figure 2. Timing Diagram Rev Page AD9233BCPZ-105 AD9233BCPZ-125 Min Typ Max Min Typ 20 105 20 10 105 10 9.5 8 2.85 4.75 6.65 2.4 4 4.28 4.75 5.23 3.6 4 3.1 3.9 4.8 3.1 3.9 4.4 4.4 3 ...
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AD9233 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating ELECTRICAL AVDD to AGND −0 +2.0 V DRVDD to DRGND −0 +3.9 V AGND to DRGND −0 +0.3 V AVDD to DRVDD −3 +2.0 ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 7. Pin Function Description Pin No. Mnemonic 0, 21, 23, 29, AGND 32, 37 (LSB) to D11 (MSB) 7, 16, 47 DRGND 8, 17, 48 DRVDD ...
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AD9233 EQUIVALENT CIRCUITS VIN Figure 4. Equivalent Analog Input Circuit AVDD 1.2V 10kΩ 10kΩ CLK+ Figure 5. Equivalent Clock Input Circuit DRVDD 1kΩ SDIO/DCS Figure 6. Equivalent SDIO/DCS Input Circuit DRVDD DRGND Figure 7. Equivalent Digital Output Circuit SCLK/DFS OEB ...
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TYPICAL PERFORMANCE CHARACTERISTICS AVDD = 1.8 V; DRVDD = 2.5 V; maximum sample rate, DCS enabled internal reference p-p differential input; AIN = −1.0 dBFS; 64k sample 25°C, unless otherwise noted. All figures show ...
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AD9233 0 125MSPS 225.3MHz @ –1dBFS –20 SNR = 68.5dBc (69.5dBFS) ENOB = 11.0 BITS SFDR = 80.4dBc –40 –60 –80 –100 –120 –140 0 15.625 31.250 FREQUENCY (MHz) Figure 18. AD9233-125 Single-Tone FFT with F 0 125MSPS 300.3MHz @ ...
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FREQUENCY (MHz) Figure 24. AD9233-125 Two-Tone FFT with F IN1 0 125MSPS 169.1MHz @ –7dBFS –20 172.1MHz @ –7dBFS SFDR = 84dBc (91dBFS) –40 –60 –80 –100 –120 –140 ...
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AD9233 100 95 SFDR SNR CLOCK FREQUENCY (MSPS) Figure 30. AD9233 Single-Tone SNR/SFDR vs. Clock Frequency (F ) with 100 SFDR DCS = ON 90 SFDR DCS ...
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THEORY OF OPERATION The AD9233 architecture consists of a front-end SHA followed by a pipelined switched capacitor ADC. The quantized outputs from each stage are combined into a final 12-bit result in the digital correction logic. The pipelined architecture permits ...
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AD9233 1V p-p 49.9Ω 499Ω R 499Ω AD8138 C 0.1µF 523Ω R 499Ω Figure 37. Differential Input Configuration Using the AD8138 For baseband applications where SNR is a key parameter, differential transformer coupling is the recommended input configuration. An example ...
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Single-Ended Input Configuration Although not recommended possible to operate the AD9233 in a single-ended input configuration, as long as the input voltage swing is within the AVDD supply. Single-ended operation can provide adequate performance in cost-sensitive applications. In ...
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AD9233 Table 9. Reference Configuration Summary Selected Mode SENSE Voltage External Reference AVDD Internal Fixed Reference VREF Programmable Reference 0 VREF Internal Fixed Reference AGND to 0 –0.25 VREF = 1V –0.50 –0.75 –1.00 –1.25 0 ...
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A third option is to ac-couple a differential LVDS signal to the sample clock input pins, as shown in Figure 48. The AD9510/ AD9511/AD9512/AD9513/AD9514/AD9515 drivers offers excellent jitter performance. 0.1µF CLOCK CLK INPUT AD951x LVDS DRIVER 0.1µF CLOCK CLK INPUT ...
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AD9233 Treat the clock input as an analog signal in cases where aperture jitter may affect the dynamic range of the AD9233. Power supplies for clock drivers should be separated from the ADC output driver supplies to avoid modulating the ...
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Power-Down Mode By asserting the PDWN pin high, the AD9233 is placed in power-down mode. In this state, the ADC typically dissipates 1.8 mW. During power-down, the output drivers are placed in a high impedance state. Reasserting the PDWN pin ...
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AD9233 TIMING The lowest typical conversion rate of the AD9233 is 10 MSPS. At clock rates below 10 MSPS, dynamic performance can degrade. The AD9233 provides latched data outputs with a pipeline delay of 12 clock cycles. Data outputs are ...
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SERIAL PORT INTERFACE (SPI) The AD9233 SPI allows the user to configure the converter for specific functions or operations through a structured register space provided inside the ADC. This provides the user added flexibility and customization depending on the application. ...
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AD9233 MEMORY MAP READING THE MEMORY MAP TABLE Each row in the memory map table has eight address locations. The memory map is roughly divided into three sections: chip configuration registers map (Address 0x00 to Address 0x02), device index and ...
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Table 15. Memory Map Register Addr Parameter Bit 7 (Hex) Name (MSB) Bit 6 Chip Configuration Registers 00 chip_port_config 0 LSB First 0 = Off (Default chip_id 02 chip_grade Open Open Device Index and Transfer Registers ...
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AD9233 Addr Parameter Bit 7 (Hex) Name (MSB) Bit 6 0D test_io 14 output_mode Output Driver Configuration 00 for DRVDD = 3 for DRVDD = 1 output_phase DCO Open Polarity 1 = Inverted 0 = Normal ...
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LAYOUT CONSIDERATIONS POWER AND GROUND RECOMMENDATIONS When connecting power to the AD9233 recommended that two separate supplies be used: one for analog (AVDD, 1.8 V nominal) and one for digital (DRVDD, 1 3.3 V nominal). If ...
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AD9233 EVALUATION BOARD The AD9233 evaluation board provides all of the support circuitry required to operate the ADC in its various modes and configurations. The converter can be driven differentially through a double balun configuration (default) or through the AD8352 ...
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DEFAULT OPERATION AND JUMPER SELECTION SETTINGS The following is a list of the default and optional settings or modes allowed on the AD9233 Rev. A evaluation board. POWER Connect the switching power supply that is supplied in the evaluation kit ...
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AD9233 ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION This section provides a brief description of the alternative analog input drive configuration using the using this particular drive option, some components need to be populated as listed in Table 16. For more details ...
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SCHEMATICS RC0402 RC0402 RC040 2 RC040 2 RC0402 CC0402 2 HSMS281 2 HSMS281 RC0402 CC0402 CC0402 RC060 3 RC060 3 Figure 60. Evaluation Board Schematic, DUT Analog Inputs Rev Page AD9233 05492-058 CC0402 RC060 3 ...
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AD9233 Figure 61. Evaluation Board Schematic, DUT, VREF, and Digital Output Interface RC060 3 Rev Page 05492-059 ...
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CC0402 CC0402 RC0402 RC060 3 CC0402 CC0402 RC060 3 RC060 3 Figure 62. Evaluation Board Schematic, DUT Clock Inputs Rev Page CC0402 CC0402 CC0402 CC0402 RC0402 RC0402 RC0402 RC0402 S10 ...
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AD9233 RC0603 SDO_CH A RC0603 CSB1_CHA RC0603 SDI_CHA RC0603 SCLK_CH A RC0603 RC0603 RC0603 RC0603 RC0603 1 2 PICVCC PICVCC 3 4 GP1 GP1 5 6 GP0 GP0 7 8 MCLR-GP3 MC LR-GP3 RC060 Figure 63. Evaluation ...
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GND GND 1 1 GND GND GND CR500 1 2 Figure 64. Evaluation Board Schematic, Power Supply Inputs Rev Page AD9233 05492-055 TP509 TP512 TP511 TP510 ...
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AD9233 EVALUATION BOARD LAYOUTS Figure 65. Evaluation Board Layout, Primary Side Figure 66. Evaluation Board Layout, Secondary Side (Mirrored Image) Rev Page ...
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Figure 67. Evaluation Board Layout, Ground Plane Figure 68. Evaluation Board Layout, Power Plane Rev Page AD9233 ...
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AD9233 Figure 70. Evaluation Board Layout, Silkscreen Secondary Side (Mirrored Image) Figure 69. Evaluation Board Layout, Silkscreen Primary Side Rev Page ...
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BILL OF MATERIALS (BOM) Table 16. Evaluation Board BOM Omit Item Qty. (DNI) Reference Designator 1 1 AD9246CE_REVA 2 24 C1, C2, C509, C510, C511, C512, C514, C515, C516, C517, C528, C530, C532, C533, C538, C539, C540, C542, C543, C544, ...
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AD9233 Omit Item Qty. (DNI) Reference Designator 29 6 R1, R6, R563, R565, R574, R577 30 5 R2, R5, R561, R562, R571 6 R10, R11, R12, R535, R536, R575 R7, R8, R9, R502, R510, ...
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... IC SC70 Dual buffer IC SC70 Dual buffer IC 48-Lead Buffer/line driver TSSOP DUT 48-Lead ADC (AD9233) LFCSP IC 16-Lead Differential LFCSP amplifier Rev Page AD9233 Supplier/Part No. Microchip PIC12F629 Fairchild NC7WZ16 Fairchild NC7WZ07 Fairchild 74VCX162244 Analog Devices, Inc. AD9233BCPZ Analog Devices, Inc. AD8352ACPZ ...
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... OUTLINE DIMENSIONS PIN 1 INDICATOR 1.00 12° MAX 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range 2 AD9233BCPZ-125 –40°C to +85°C 2 AD9233BCPZRL7–125 –40°C to +85°C 2 AD9233BCPZ-105 –40°C to +85°C 2 AD9233BCPZRL7–105 –40°C to +85°C 2 AD9233BCPZ-80 –40°C to +85°C 2 AD9233BCPZRL7– ...
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NOTES Rev Page AD9233 ...
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AD9233 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05492-0-8/06(A) Rev Page ...