TC850CPL Microchip Technology, TC850CPL Datasheet
TC850CPL
Specifications of TC850CPL
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TC850CPL Summary of contents
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... DB1 16 17 DB0 TC850 40-Pin PDIP/CERDIP REF + REF1 REF1 REF OVR/POL 6 35 REF2 L REF2 TC850CPL 8 33 REF + DB7 2 TC850IJL 9 IN+ DB6 DB5 IN- ANALOG 11 30 DB4 COMMON 29 C DB3 12 INTB 28 C DB2 13 INTA DB1 BUFA 26 C DB0 15 BUFB BUSY 16 25 BUFFER ...
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... INT OUT BUF INT Buffer + Integrator TC850 ÷4 Bus Interface Decode Logic OSC CONT/ L/H OVR DEMAND POL –5V + Comparator + - 6-Bit 9-Bit Up/Down Up/Down Counter Counter Data Latch Octal 2-Input Mux 3-State Data Bus . . . . DB0 DB7 © 2006 Microchip Technology Inc. ...
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... Digital inputs have CMOS logic levels and internal pull-up/pull-down resistors. For TTL compatibility, external pull-up resistors to V are recommended. DD © 2006 Microchip Technology Inc. *Stresses above Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional ...
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... Pins 8 -15, High-impedance State LOW (Note HIGH LOW, (Note LOW, (Note HIGH LOW, (Note HIGH LOW LOW, (Note HIGH LOW LOW, (Note 1) Positive or Negative Pulse Width CS = HIGH LOW, (Note HIGH LOW, (Note HIGH LOW, (Note 1) © 2006 Microchip Technology Inc. ...
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... NOTES: Unless otherwise specified, all 0.1 μF capacitors are film dielectric. Ceramic capacitors are not recommended Connection *Polypropylene capacitors. ** 100 pF Mica capacitors. FIGURE 1-1: Standard Test Circuit Configuration © 2006 Microchip Technology Inc. -5V + 100 MΩ V DGND IN+ 16 BUSY 0.01 μF Input ...
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... Connection for integrator auto-zero capacitor. Bypass to V Connection for integrator auto-zero capacitor. Bypass to V Analog common. Negative differential analog input. Positive differential analog input μ P interrupt. μ with 0 INT and C . INT INT . INT μ with 0 μ with 0 μ with 0 μ with 0 © 2006 Microchip Technology Inc. ...
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... REF Note 1: This pin incorporates a pull-down resistor to DGND. 2: This pin incorporates a pull-up resistor Pins 1, 23 and 34 (44-PLCC) package are NC “No Internal connection”. © 2006 Microchip Technology Inc. Description + Positive input for reference voltage Positive connection for V reference capacitor. REF2 – ...
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... V = 3.2768V). The set to V REF2 REF1 is recommended. REF2 "Fast" Reference De-integrate (9-Bit Resolution) "Slow" Reference De-integrate (6-Bit Resolution) End of Conversion 0V Time “Fast Slow” Reference De- © 2006 Microchip Technology Inc. /64 ...
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... Analog Section Simplified Schematic . . . . . . . Internal Clock 246 Conversion Zero Integrator Phase FIGURE 4-2: Conversion Timing © 2006 Microchip Technology Inc. 4.1 Conversion Timing Each conversion consists of three phases: 1. Zero Integrator 2. Signal Integrate 3. Reference Integrate (or De-integrate) Each conversion cycle requires 1280 internal clock cycles (Figure 4-2) ...
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... In addition to 512 counts of fast, 64 counts of slow and 192 counts of overrange de-integrate, the reference integrate phase uses 10 clock pulses to permit internal nodes to settle. Therefore, the reference integrate cycle occupies 778 clock pulses. © 2006 Microchip Technology Inc. ). The inte- REF1 + IN ...
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... Common mode voltage (i.e., REF-) near or at the analog common potential. All voltage reference inputs are high-imped- ance. Average reference input current is typically only 30 pA. © 2006 Microchip Technology Inc. 5.3 Analog Common (ANALOG COMMON) Analog common is used as the IN- return during the zero integrator and de-integrate phases of each con- version ...
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... BUSY output falling edge. After this time (i.e.,1/2 clock cycle before BUSY goes high) the internal counters are reset and the data is lost. . The ÷ Low-Byte Up/Down Counter High-Byte Up/Down Counter To A/D Control Logic Polarity Overrange © 2006 Microchip Technology Inc. ...
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... All three data bytes must be read within 443-1/2 clock cycles after the falling edge of BUSY. c. The c input must go high after each byte is read, so that the internal byte counter will be incremented. However, the CS and CEinputs can remain enabled through the entire data transfer sequence. © 2006 Microchip Technology Inc. L/H OVR/POL DB7 ...
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... BUSY. The output-high period is fixed at 836 clock periods, regardless of the analog input value. BUSY is active during Continuous and Demand mode operation. This output can also be used to generate an end-of- μP-based conversion interrupt in Noninterrupt-driven systems can poll BUSY to determine when data is valid. © 2006 Microchip Technology Inc. systems. ...
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... INT 25 μA For a full scale voltage of 3.2768V, values of R between 120 kΩ and 150 kΩ are acceptable. © 2006 Microchip Technology Inc. 7.1.3 INTEGRATION CAPACITOR The integration capacitor should be selected to produce an integrator swing of ≈ full scale. The capacitor value is easily calculated: ...
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... OVR/POL RD WR BUSY +5V CS CONT/DEMAND Address Data Bus X00 High Byte Polarity X01 Low Byte X10 High Byte Overrange FIGURE 8-2: Interface to Typical Bus © 2006 Microchip Technology Inc. System Clock DB0 DB1 DB2 DB3 DB4 DB5 μP DB6 DB7 A2 A15 INTERRUPT μ ...
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... Demand mode, with the start-up conversion strobe generated by a μC/μP output pin. In this case, the L/H and CONT/DEMAND inputs can be controlled by I/O pins and the RD input connected to digital ground. © 2006 Microchip Technology Inc. 8.3 Demand Mode Interface Timing When CONT/DEMAND input is LOW, the TC850 performs a conversion each time CE and CS are active and WR is strobed LOW ...
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... Data Bits Data Bits "1"= Positive "1"= Input Polarity Overrange Next Convert Next Conversion Command will be can Begin Recognized 125 Clock Cycles New Conversion Data Valid T DHC T DHR High-Impedance Data Bit 7 High-Impedance Don't Care Don't Care © 2006 Microchip Technology Inc. ...
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... Conversion Timing, Continuous Mode CONT/DEMAND BUSY DB0-DB7 HI-Z NOTES HIGH LOW FIGURE 8-7: Bus Output Timing, Continuous Mode © 2006 Microchip Technology Inc 1280 Internal Clock Cycles 443-1/2 Clock T WRE T WRD Data Bits 8-14 Data Bits 0-7 Polarity TC850 . . . . . ...
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... Min. .060 (1.52) .020 (0.51) .015 (0.38) .008 (0.20) .150 (3.81) Min. .020 (0.51) .016 (0.41) W Reel Size 13 in .620 (15.75) .590 (15.00) ° 3 Min. .700 (17.78) .620 (15.75) Dimensions: inches (mm) © 2006 Microchip Technology Inc. ...
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... PLCC .695 (17.65) .685 (17.40) .656 (16.66) .650 (16.51) .656 (16.66) .650 (16.51) .695 (17.65) .685 (17.40) © 2006 Microchip Technology Inc. Pin 1 .555 (14.10) .530 (13.46) .610 (15.49) .590 (14.99) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) ...
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... TC850 NOTES: DS21479C-page 22 © 2006 Microchip Technology Inc. ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2006 Microchip Technology Inc. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
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... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21479C-page 24 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS21479C © 2006 Microchip Technology Inc. ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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