TC850CPL Microchip Technology, TC850CPL Datasheet - Page 6

• Manufacturer Part Number: TC850CPL
• Description: IC ADC 15BIT FAST 40DIP
• Manufacturer: Microchip Technology

Specifications of TC850CPL

• Data Interface: Parallel
• Number Of Bits: 15
• Sampling Rate (per Second): 40
• Number Of Converters: 1
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Resolution (bits): 15bit
• Sampling Rate: 40SPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: ± 5V
• Supply Current: 2mA
• Digital Ic Case Style: DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC850
2.0
The descriptions of the pins are listed in Table .
DS21479C-page 6
TABLE 2-1:
Note 1: This pin incorporates a pull-down resistor to DGND.
PDIP/CERDIP)
Pin Number
(40-Pin
9-15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
2: This pin incorporates a pull-up resistor to V
3: Pins 1, 23 and 34 (44-PLCC) package are NC “No Internal connection”.
1
2
3
4
5
6
7
8
PIN DESCRIPTIONS
(44-Pin PLCC)
Pin Number
PIN FUNCTION TABLE
10-17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
2
3
4
5
6
7
8
9
COMMON
OVR/POL
DEMAND
DB6-DB0
ANALOG
BUFFER
Symbol
INT
CONT/
DGND
COMP
C
C
BUSY
OSC
OSC
TEST
C
C
INT
DB7
WR
V
L/H
IN–
IN+
CS
CE
RD
BUFB
BUFA
INTB
INTA
SS
OUT
IN
1
2
Description
Chip Select, active HIGH. Logically ANDed, with CE to enable read and write
inputs (Note 1).
Chip enable, active LOW (Note 2).
Write input, active LOW. When chip is selected (CS = HIGH and CE = LOW) and
in Demand mode (CONT/DEMAND = LOW), a logic LOW on WR starts a
conversion (Note 1).
Read input, active LOW. When CS = HIGH and CE = LOW, a logic LOW on RD
enables the 3-state data outputs (Note 2).
Conversion control input. When CONT/DEMAND = LOW, conversions are initi-
ated by the WR input. When CONT/DEMAND = HIGH, conversions are
performed continuously (Note 1).
Overrange/polarity data-select input. When making conversions in the Demand
mode (CONT/DEMAND = LOW), OVR/POL controls the data output on DB7
when the high-order byte is active (Note 2).
Low/high byte-select input. When CONT/DEMAND = LOW, this input controls
whether low-byte or high-byte data is enabled on DB0 through DB7 (Note 2).
Most Significant data bit output. When reading the A/D conversion result, the
polarity, overrange and DB7 data are output on this pin.
Data outputs DB6-DB0. 3-state, bus compatible.
A/D conversion status output. BUSY goes to a logic HIGH at the beginning of the
de-integrate phase, then goes LOW when conversion is complete. The falling
edge of BUSY can be used to generate a
Crystal oscillator connection or external oscillator input.
Crystal oscillator connection.
For factory testing purposes only. Do not make external connection to this pin.
Digital ground connection.
Connection for comparator auto-zero capacitor. Bypass to V
Negative power supply connection, typically -5V.
Output of the integrator amplifier. Connect to C
Input to the integrator amplifier. Connect to summing node of R
Output of the input buffer. Connect to R
Connection for buffer auto-zero capacitor. Bypass to V
Connection to buffer auto-zero capacitor. Bypass to V
Connection for integrator auto-zero capacitor. Bypass to V
Connection for integrator auto-zero capacitor. Bypass to V
Analog common.
Negative differential analog input.
Positive differential analog input.
DD
.
INT
μ
.
P interrupt.
INT
© 2006 Microchip Technology Inc.
.
SS
SS
with 0.1
with 0.1
SS
SS
SS
with 0.1
with 0.1
with 0.1
INT
μ
μ
F.
and C
F.
μ
μ
F.
F.
μ
INT
F.
.