CS5510-ASZ Cirrus Logic Inc, CS5510-ASZ Datasheet - Page 15

• Manufacturer Part Number: CS5510-ASZ
• Description: IC ADC 16BIT EXTERNAL OSC 8-SOIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5510-ASZ

• Number Of Converters: 1
• Package / Case: 8-SOIC (0.200", 5.30mm Width)
• Number Of Bits: 16
• Sampling Rate (per Second): 326
• Data Interface: Serial
• Power Dissipation (max): 1.9mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Architecture: Delta-Sigma
• Conversion Rate: 16 SPs to 326 SPs
• Resolution: 16 bit
• Input Type: Voltage
• Interface Type: Serial
• Voltage Reference: 250 mV to 5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

CS5511/13 and oscillates at 64 kHz ±32 kHz. The
output word rate (OWR) for the CS5511/13 is de-
rived from the internal oscillator, and is equal to
f
oscillator frequency, the OWR of the CS5511/13
can vary between 53 Sps and 159 Sps.
2.5
After power and a clock source are established to
the CS5510/11/12/13, the ADCs begin performing
conversions. The three sections that follow explain
DS337F4
osc
Figure 14. Typical Linearity Error for CS5510.
Figure 12. External (CMOS Compatible) Clock
/612. Due to the part-to-part variances in the
47 pF
0.0035
0.0025
0.0015
0.0005
Performing Conversions
0.004
0.003
0.002
0.001
0
10
30
32.768 kHz
10 M Ω
VD+ = 2.5 V to 5.25 V
50
OWR = SCLK
SCLK (kHz)
70
612
Fairchild NC7SU04
or 1/6 74HCU04
90
49.9 KΩ
22 pF
To SCLK
110
130
how to read conversion data from each ADC, and
decode the conversion word into the respective
flag and data bits. Keep in mind that in the
CS5510/12, SCLK provides the external clock
source for the converter. Data is clocked from the
CS5510/12 at the rate set by the external clock
source (typically 32.768 kHz). The CS5511/13 pro-
vides an on-chip oscillator for the master clock. In
the CS5511/13, SCLK is asynchronous to the on-
chip oscillator and can be clocked at a rate up to
2 MHz.
Figure 15. Typical Linearity Error for CS5512.
Figure 13. Using a Microcontroller as a Clock
CS5510/12
0.0025
0.0015
0.0005
0.003
0.002
0.001
0
0
SCLK
SDO
CS
20
40
60 80 100 120 140 160 180 200
OWR = SCLK
CS5510/11/12/13
SCLK (kHz)
612
Counter/Timer
µC
15