AD7323BRUZ Analog Devices Inc, AD7323BRUZ Datasheet - Page 23

• Manufacturer Part Number: AD7323BRUZ
• Description: IC ADC 12BIT+ SAR 4CHAN 16TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7323BRUZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 12
• Sampling Rate (per Second): 500k
• Number Of Converters: 1
• Power Dissipation (max): 17mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Resolution (bits): 13bit
• Sampling Rate: 500kSPS
• Input Channel Type: Pseudo Differential, Single Ended
• Supply Current: 900µA
• Digital Ic Case Style: TSSOP
• No. Of Pins: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7323CBZ - BOARD EVALUATION FOR AD7323CBZ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

CONTROL REGISTER
The control register is used to select the analog input channel,
analog input configuration, reference, coding, and power mode.
The control register is a write-only, 12-bit register. Data loaded
on the DIN line corresponds to the AD7323 configuration for
the next conversion. If the sequence register is being used, data
should be loaded into the control register after the range
MSB
15
Write
Table 9. Control Register Details
Bit
12, 1
11, 10
9, 8
7, 6
5
4
3, 2
Table 10. Analog Input Configuration Selection
ADD1
0
0
1
1
Address Bits
Channel
14
Register Select 1
Mnemonic
Zero
ADD1, ADD0
Mode 1, Mode 0
PM1, PM0
Coding
Ref
Seq1, Seq2
ADD0
0
1
0
1
V
V
V
V
3 Pseudo Differential Inputs
13
Register Select 2
IN
IN
IN
IN
0
1
2
+
Mode 1 = 1, Mode 0 = 1
Not allowed
Description
A 0 should be written to these bits.
These two channel address bits are used to select the analog input channel for the next conversion if the
sequencer is not being used. If the sequencer is being used, the two channel address bits are used to
select the final channel in a consecutive sequence.
These two mode bits are used to select the configuration of the four analog input pins, V
pins are used in conjunction with the channel address bits. On the AD7323, the analog inputs can be
configured as four single-ended inputs, two true differential input pairs, two pseudo differential inputs, or
three pseudo differential inputs (see Table 10).
The power management bits are used to select different power mode options on the AD7323 (see Table 11).
This bit is used to select the type of output coding the AD7323 uses for the next conversion result. If
coding = 0, the output coding is twos complement. If coding = 1, the output coding is straight binary.
When operating in sequence mode, the output coding for each channel is the value written to the coding
bit during the last write to the control register.
The reference bit is used to enable or disable the internal reference. If Ref = 0, the external reference is
enabled and used for the next conversion, and the internal reference is disabled. If Ref = 1, the internal
reference is used for the next conversion. When operating in sequence mode, the reference used for each
channel is the value written to the Ref bit during the last write to the control register.
The Sequence 1 and Sequence 2 bits are used to control the operation of the sequencer (see Table 12).
V
V
V
V
12
Zero
IN
IN
IN
IN
3
3
3
−
11
ADD1
V
V
V
V
V
2 Fully Differential Inputs
IN
IN
IN
IN
IN
Mode 1 = 1, Mode 0 = 0
10
ADD0
0
0
2
2
+
Rev. A | Page 23 of 36
9
Mode 1
V
V
V
V
V
IN
IN
IN
IN
IN
1
1
3
3
−
register and the sequence register have been initialized. The bit
functions of the control register are shown in Table 9 (the power-
up status of all bits is 0).
The four analog input channels can be configured as four single-
ended analog inputs, two true differential input pairs, two
pseudo differential inputs, or three pseudo differential inputs.
8
Mode 0
7
PM1
2 Pseudo Differential Inputs
V
V
V
V
V
IN
IN
IN
IN
IN
0
0
2
2
Mode 1 = 0, Mode 0 = 1
+
6
PM0
5
Coding
V
V
V
V
V
IN
IN
IN
IN
IN
1
1
3
3
−
4
Ref
3
Seq1
V
V
V
V
V
Mode 1 = 0, Mode 0 = 0
4 Single-Ended Inputs
IN
IN
IN
IN
IN
0
1
2
3
+
2
Seq2
IN
0 to V
AD7323
V
AGND
AGND
AGND
AGND
IN
1
Zero
IN
3. These
−
LSB
0
0