AD7323BRUZ Analog Devices Inc, AD7323BRUZ Datasheet - Page 30

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AD7323BRUZ

Manufacturer Part Number
AD7323BRUZ
Description
IC ADC 12BIT+ SAR 4CHAN 16TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7323BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
500k
Number Of Converters
1
Power Dissipation (max)
17mW
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
13bit
Sampling Rate
500kSPS
Input Channel Type
Pseudo Differential, Single Ended
Supply Current
900µA
Digital Ic Case Style
TSSOP
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7323CBZ - BOARD EVALUATION FOR AD7323CBZ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7323BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD7323
AUTOSHUTDOWN MODE (PM1 = 1, PM0 = 0)
Once the autoshutdown mode is selected, the AD7323 auto-
matically enters shutdown on the 15
autoshutdown mode, all internal circuitry is powered down.
The AD7323 retains information in the registers during
autoshutdown. The track-and-hold is in hold mode during
autoshutdown. On the rising CS edge, the track-and-hold,
which was in hold during shutdown, returns to track as the
AD7323 begins to power up. The power-up from autoshutdown
is 500 μs.
When the control register is programmed to transition to
autoshutdown mode, it does so on the 15
Figure 48 shows the part entering autoshutdown mode. The
AD7323 automatically begins to power up on the CS rising
edge. The t
by bringing the CS signal low, can take place. Once this valid
conversion is complete, the AD7323 powers down again on the
15
keep the part in autoshutdown mode.
AUTOSTANDBY MODE (PM1 = 0, PM0 = 1)
In autostandby mode, portions of the AD7323 are powered
down, but the on-chip reference remains powered up. The
reference bit in the control register should be 1 to ensure that
the on-chip reference is enabled. This mode is similar to auto-
shutdown but allows the AD7323 to power up much faster,
which allows faster throughput rates.
th
SDATA
SCLK rising edge. The CS signal must remain low again to
SCLK
DIN
CS
POWER-UP
CONTROL REGISTER IS LOADED ON THE FIRST 15 CLOCKS,
1
is required before a valid conversion, initiated
DATA INTO CONTROL REGISTER
PART ENTERS SHUTDOWN MODE
ON THE 15TH RISING SCLK EDGE
AS PM1 = 1, PM0 = 0
PM1 = 1, PM0 = 0
VALID DATA
th
SCLK rising edge. In
th
SCLK rising edge.
Figure 48. Entering Autoshutdown/Autostandby Mode
15
PART BEGINS TO POWER
UP ON CS RISING EDGE
16
Rev. A | Page 30 of 36
As is the case with autoshutdown mode, the AD7323 enters
standby on the 15
updated (see Figure 48). The part retains information in the
registers during standby. The AD7323 remains in standby until
it receives a CS rising edge. The ADC begins to power up on the
CS rising edge. On the CS rising edge, the track-and-hold, which
was in hold mode while the part was in standby, returns to track.
The power-up time from standby is 750 ns. The user should
ensure that 750 ns have elapsed before bringing CS low to attempt
a valid conversion. Once this valid conversion is complete, the
AD7323 again returns to standby on the 15
The CS signal must remain low to keep the part in standby mode.
Figure 48 shows the part entering autoshutdown mode. The
sequence of events is the same when entering autostandby mode.
In Figure 48, the power management bits are configured for
autoshutdown. For autostandby mode, the power management
bits, PM1 and PM0, should be set to 0 and 1, respectively.
t
POWER-UP
THE PART IS FULLY POWERED UP
ONCE
t
POWER-UP
1
th
SCLK rising edge once the control register is
HAS ELAPSED
DATA INTO CONTROL REGISTER
VALID DATA
th
SCLK rising edge.
15
16

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