MAX11203EEE+T Maxim Integrated Products, MAX11203EEE+T Datasheet
MAX11203EEE+T
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MAX11203EEE+T Summary of contents
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... PROGRAMMABLE GAIN 24 MAX11210 20 MAX11206 18 MAX11209 16 MAX11213 _______________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. S 16-Bit Noise-Free Resolution S 570nV Noise at 10sps, ±3.6V RMS S 3ppm INL (typ), 20ppm (max Missing Codes S Ultra-Low Power Dissipation Operating-Mode Current Drain < ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO ABSOLUTE MAXIMUM RATINGS Any Pin to GND ....................................................-0.3V to +3.9V AVDD to GND .......................................................-0.3V to +3.9V DVDD to GND ......................................................-0.3V to +3.9V Analog Inputs (AINP, AINN, REFP, REFN) to ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO ELECTRICAL CHARACTERISTICS (continued +3.6V +1.7V, V AVDD DVDD REFP unless otherwise noted. Typical values are at T PARAMETER SYMBOL Absolute Input Voltage DC Input Leakage ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO ELECTRICAL CHARACTERISTICS (continued +3.6V +1.7V, V AVDD DVDD REFP unless otherwise noted. Typical values are at T PARAMETER SYMBOL POWER REQUIREMENTS Analog Supply Digital Supply ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO (V = 3.6V 1.8V AVDD DVDD REFP +25NC.) A ANALOG ACTIVE CURRENT vs. AVDD VOLTAGE (NO BUFFERS ENABLED) 260 LINEF = ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO (V = 3.6V 1.8V AVDD DVDD REFP +25NC.) A INTERNAL OSCILLATOR FREQUENCY vs. TEMPERATURE 3 3.0V 2.9 AVDD 2.8 ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO AVDD DVDD GND AINP AINN REFP REFN *PROGRAMMABLE GAIN ONLY AVAILABLE ON THE MAX11213. _______________________________________________________________________________________ TIMING PROGRAMMABLE DIGITAL FILTER 4 (SINC ) 3RD-ORDER DELTA-SIGMA MODULATOR MAX11203 MAX11213* Functional Diagram ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO PIN NAME 1 GPIO1 General-Purpose I/O 1. Register controllable using SPI. 2 GPIO2 General-Purpose I/O 2. Register controllable using SPI. 3 GPIO3 General-Purpose I/O 3. Register controllable using SPI. ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Detailed Description The MAX11203/MAX11213 are ultra-low-power (< 300FA active), high-resolution, low-speed, serial-output ADCs. These ADCs provide the highest resolution per unit power in the industry, and are optimized for ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO 2.048MHz oscillator. The 2.4576MHz oscillator provides maximum 60Hz rejection, and the 2.048MHz oscillator provides maximum 50Hz rejection. See Figures 1 and 2. For optimal simultaneous 50Hz and 60Hz rejection, ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Table 3a. Example of Self-Calibration STEP DESCRIPTION 1 Initial power-up 2 Enable self-calibration registers 3 Self-calibration, DIN = 10010000 Table 3b. Example of System Calibration STEP DESCRIPTION 1 Initial ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO NORMAL MODE REJECTION DATA RATE 10.0sps 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 FREQUENCY (Hz) ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO MAX313 LOGIC SWITCH 0 OFF 1 ON IN1 IN2 AIN1 IN3 AIN2 IN4 AIN3 AIN4 MAX313 COM1 COM2 COM3 COM4 Figure 3. MAX11203 GPIOs Drive an External 4-Channel Switch ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Serial-Digital Interface The MAX11203/MAX11213 interface is fully compatible with SPI-, QSPI-, and MICROWIRE-standard serial inter- faces. The SPI interface provides access to nine on-chip registers that are 8 or ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO CSS0 SCLK 1 DIN RS3 t DOE HIGH-Z RDY/DOUT Figure 7. SPI Register Access Read Communication between the user ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Table 7. Operating Mode (MODE Bit) MODE BIT SETTING 0 The command byte initiates a conversion or an immediate power-down. See Tables 5 and 8. The device interprets the ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Table 10. Register Address Map REGISTER ADDRESS R/W NAME SEL (RS[3:0]) STAT1 R 0x0 SYSOR CTRL1 0x1 LINEF R/W CTRL2 0x2 DIR4 R/W CTRL3 0x3 DGAIN2* R/W DATA R ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Table 11. STAT1 Register (Read Only) BIT B7 BIT NAME SYSOR 0 DEFAULT SYSOR: The system gain overrange bit, when set to 1, indicates that a system gain calibration ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO The byte-wide CTRL1 register is a bidirectional read/write register. The byte written to the CTRL1 register indicates if the part converts continuously or single cycle external or ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO The byte-wide CTRL2 register is a bidirectional read/write register. The byte written to the CTRL2 register controls the direction and values of the digital I/O ports. Table 13. CTRL2 ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO The data register is a 24-bit read-only register. Any attempt to write data to the data register has no effect. The data read from this register is clocked out ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO Table 16b. Output Data Formats for the Bipolar Input Range INPUT VOLTAGE AINP AINN ≥ V REF × 1 − ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO The system gain calibration register is a 24-bit read/write register. The data written/read to/from this register is clocked in/out MSB first. This register holds the system gain calibration value. ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO The self-calibration gain register is a 24-bit read/write register. The data written/read to/from this register is clocked in/out MSB first. This register holds the self-calibration gain calibration value. The ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO REF1 REF2 I REF2 REFP R REF MAX11203 I REF1 MAX11213 REFN AINP R RTD AINN GND Figure 8. RTD Temperature Measurement Circuit AVDD ...
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Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO AVDD R STRAIN AVDD AINP R STRAIN MAX11213 AINN Figure 10. The MAX11213 ADC Eliminates an External Gain Stage. 26 _____________________________________________________________________________________ PROCESS: BiCMOS For the latest package outline information ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2010 Maxim Integrated Products © ...