AD9218BST-RL80 Analog Devices Inc, AD9218BST-RL80 Datasheet - Page 18

• Manufacturer Part Number: AD9218BST-RL80
• Description: IC ADC 10BIT DUAL 80MSPS 48LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9218BST-RL80

• Rohs Status: RoHS non-compliant
• Number Of Bits: 10
• Sampling Rate (per Second): 80M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 525mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP

AD9218
THEORY OF OPERATION
The AD9218 ADC architecture is a bit-per-stage pipeline-type
converter utilizing switch capacitor techniques. These stages
determine the 7 MSBs and drive a 3-bit flash. Each stage
provides sufficient overlap and error correction, allowing
optimization of comparator accuracy. The input buffers are
differential, and both sets of inputs are internally biased. This
allows the most flexible use of ac-coupled or dc-coupled and
differential or single-ended input modes. The output staging
block aligns the data, carries out the error correction, and feeds
the data to output buffers. The set of output buffers are powered
from a separate supply, allowing adjustment of the output
voltage swing. There is no discernible difference in performance
between the two channels.
USING THE AD9218 ENCODE INPUT
Any high speed ADC is extremely sensitive to the quality of the
sampling clock provided by the user. A track-and-hold circuit is
essentially a mixer. Any noise, distortion, or timing jitter on the
clock is combined with the desired signal at the analog-to-
digital output. For that reason, considerable care has been taken
in the design of the ENCODE input of the AD9218, and the
user is advised to give commensurate thought to the clock
source. The ENCODE input is fully TTL/CMOS compatible.
DIGITAL OUTPUTS
The digital outputs are TTL/CMOS compatible for lower power
consumption. During power-down, the output buffers transition to
a high impedance state. A data format selection option supports
either twos complement (set high) or offset binary output (set
low) formats.
Rev. C | Page 18 of 28
ANALOG INPUT
The analog input to the AD9218 is a differential buffer. For best
dynamic performance, impedance at A
Special care was taken in the design of the analog input section
of the AD9218 to prevent damage and data corruption when
the input is overdriven. The nominal input range is 1.024 V p-p.
Optimum performance is obtained when the part is driven
differentially where common-mode noise is minimized and
even-order harmonics are reduced. Figure 42 shows an example
of the AD9218 being driven differentially via a wideband RF
transformer for ac-coupled applications. As shown in Figure 43,
applications that require dc-coupled differential drives can be
accommodated using the AD8138 differential output op amp.
ANALOG
SOURCE
SIGNAL
50Ω
Figure 42. Using a Wideband Transformer to Drive the AD9218
ANALOG
SOURCE
SIGNAL
10kΩ
Figure 43. Using the AD8138 to Drive the AD9218
50Ω
5kΩ
AV
DD
1:1
VOCM
500Ω
0.1µF
25Ω
25Ω
525Ω
AD8138
0.1µF
500Ω
500Ω
IN
and
A
A
25Ω
25Ω
15pF
IN
AD9218
IN
A
IN
should match.
A
A
AD9218
IN
IN