CS5516-ASZ Cirrus Logic Inc, CS5516-ASZ Datasheet - Page 26

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CS5516-ASZ

Manufacturer Part Number
CS5516-ASZ
Description
IC ADC 16BIT BRIDGE TRAS 24-SOIC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5516-ASZ

Number Of Bits
16
Sampling Rate (per Second)
60
Data Interface
Serial
Number Of Converters
2
Power Dissipation (max)
37.5mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1101-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5516-ASZ
Manufacturer:
CIRRUS
Quantity:
1 000
Part Number:
CS5516-ASZ
Manufacturer:
CIRRUS
Quantity:
20 000
26
The filter will start a new convolution on the
next rising edge of the XIN clock after the 24th
SCLK falls.
Sleep Mode
The CS5516/20 configuration register has an
A/S bit which allows the users to put the device
in a sleep condition to lower quiescent power.
Upon reset the A/S bit device is set to a logic 0
which places the device in the ’awake’ condi-
tion. Writing a 1 to the A/S bit will shutdown
most of the chip, including the oscillator. It is
desirable to use the following sequence when
coming out of sleep. Write a logic 0 to the A/S
bit of the configuration register. In the same
configuration word write a logic 1 to the RF bit
of the configuration register. Then wait until it is
certain that the oscillator has started. After the
oscillator has started or a clock present on the
XIN pin, set the RF bit back to 0. The user
should then wait at least 6 output word update
periods before expecting a valid output data
word.
Noise Performance
Typical noise performance for the converter is
listed in the specification tables for each PGA
gain. Figure 13 illustrates a noise histogram for
1000 output conversions from the CS5520. The
data for the histogram was collected using the
CDB5520 evaluation board; with VREF at 2.5
volts, PGA = 4, bipolar mode. The data shows
the standard deviation of the data set is 3.2
LSBs. One LSB is equivalent to [VREF X 2(bi-
polar)]/ [Inst amp gain X PGA gain X number
of codes] or (2.5 X 2)/ (25 X 4 X 2E20) = 47.7
nV. One standard deviation is equivalent to rms
if the data is Normal or Gaussian. The rms noise
presented by the plot is 153 nV, which is in
good agreement with the typical noise specifica-
tion of 150 nV for a PGA gain of 4.
Applications
See the Application Notes section of the databook.
26
Schematic & Layout Review Service
C a l l : ( 5 1 2 ) 4 4 5 - 7 2 2 2
140
120
100
Confirm Optimum
Confirm Optimum
Schematic & Layout
Schematic & Layout
Before Building Your Board.
Before Building Your Board.
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For Our Free Review Service
Call Applications Engineering.
Call Applications Engineering.
80
60
40
20
0
Figure 13. CS5520 Noise Histogram.
-8
-7
-6
-5
-4
-3
-2
-1
CS5516, CS5520
0 1 2 3 4 5 6 7 8
DS74F2
DS74F1

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