AD5172BRMZ50 Analog Devices Inc, AD5172BRMZ50 Datasheet - Page 22

IC DGTL POT DUAL 50K 10-MSOP

AD5172BRMZ50

Manufacturer Part Number
AD5172BRMZ50
Description
IC DGTL POT DUAL 50K 10-MSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5172BRMZ50

Memory Type
Non-Volatile
Temperature Coefficient
35 ppm/°C Typical
Taps
256
Resistance (ohms)
50K
Number Of Circuits
2
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Resistance In Ohms
50K
End To End Resistance
50kohm
Resistance Tolerance
± 20%
No. Of Steps
256
Control Interface
Serial, I2C, 2-Wire
No. Of Pots
Dual
Supply Voltage Range
2.7V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5172/AD5173
Multiple Devices on One Bus (AD5173 Only)
Figure 52 shows four AD5173 devices on the same serial bus.
Each has a different slave address because the states of the AD0
and AD1 pins are different. This allows each device on the bus to
be written to or read from independently. The master device
output bus line drivers are open-drain pull-downs in a fully
I
MASTER
2
C-compatible interface.
SDA
AD5173
AD1
AD0
Figure 52. Multiple AD5173 Devices on One I
R
SCL
P
R
P
5V
SDA
AD5173
AD1
AD0
SCL
5V
5V
SDA
AD5173
AD1
AD0
SCL
2
5V
C Bus
SDA
AD5173
AD1
AD0
SCL
Rev. H | Page 22 of 24
SDA
SCL
LEVEL SHIFTING FOR DIFFERENT VOLTAGE
OPERATION
If the SCL and SDA signals come from a low voltage logic
controller and are below the minimum V
level shift the signals for read/write communications between
the AD5172/AD5173 and the controller. Figure 53 shows one
of the implementations. For example, when SDA1 is at 2.5 V,
M1 turns off, and SDA2 becomes 5 V. When SDA1 is at 0 V,
M1 turns on, and SDA2 approaches 0 V. As a result, proper
level shifting is established. It is best practice for M1 and M2
to be low threshold N-channel power MOSFETs, such as the
FDV301N from Fairchild Semiconductor.
SDA1
SCL1
V
DD1
CONTROLLER
= 2.5V
Figure 53. Level Shifting for Different Voltage Operation
2.5V
R
P
R
P
S
M1
G
D
S
M2
G
D
R
P
IH
level (0.7 V × V
2.7V TO 5.5V
AD5172/
AD5173
R
P
V
DD2
= 5V
SDA2
SCL2
DD
),

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