MAX5888AEGK+D Maxim Integrated Products, MAX5888AEGK+D Datasheet

IC DAC 16BIT 3.3V 500MSPS 68-QFN

MAX5888AEGK+D

Manufacturer Part Number
MAX5888AEGK+D
Description
IC DAC 16BIT 3.3V 500MSPS 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5888AEGK+D

Settling Time
11ns
Number Of Bits
16
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
130mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX5888 is an advanced, 16-bit, 500Msps digital-
to-analog converter (DAC) designed to meet the
demanding performance requirements of signal synthe-
sis applications found in wireless base stations and
other communications applications. Operating from a
single 3.3V supply, this DAC offers exceptional dyna-
mic performance such as 76dBc spurious-free dynamic
range (SFDR) at f
update rates of 500Msps and a power dissipation of
only 250mW.
The MAX5888 utilizes a current-steering architecture,
which supports a full-scale output current range of 2mA
to 20mA, and allows a differential output voltage swing
between 0.1V
The MAX5888 features an integrated 1.2V bandgap ref-
erence and control amplifier to ensure high accuracy
and low noise performance. Additionally, a separate
reference input pin enables the user to apply an exter-
nal reference source for optimum flexibility and to
improve gain accuracy.
The digital and clock inputs of the MAX5888 are
designed for differential low-voltage differential signal
(LVDS)-compatible voltage levels. The MAX5888 is
available in a 68-lead QFN package with an exposed
paddle (EP) and is specified for the extended industrial
temperature range (-40°C to +85°C).
Refer to the MAX5887 and MAX5886 data sheets for
pin-compatible 14- and 12-bit versions of the MAX5888.
19-2726; Rev 3; 12/03
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Performance DAC with Differential LVDS Inputs
Base Stations: Single-/Multicarrier UMTS,
CDMA, GSM
Communications: LMDS, MMDS, Point-to-Point
Microwave
Digital Signal Synthesis
Automated Test Equipment (ATE)
Instrumentation
P-P
and 1V
________________________________________________________________ Maxim Integrated Products
OUT
General Description
= 40MHz. The DAC supports
P-P
.
3.3V, 16-Bit, 500Msps High Dynamic
Applications
o 500Msps Output Update Rate
o Single 3.3V Supply Operation
o Excellent SFDR and IMD Performance
o 2mA to 20mA Full-Scale Output Current
o Differential, LVDS-Compatible Digital and Clock
o On-Chip 1.2V Bandgap Reference
o Low 130mW Power Dissipation
o 68-Lead QFN-EP Package
*EP = Exposed paddle.
MAX5888AEGK
MAX5888EGK
CLKGND
CLKGND
TOP VIEW
DGND
CLKN
Inputs
DV
VCLK
CLKP
VCLK
B3P
B3N
B2P
B2N
B1P
B1N
B0P
B0N
PD
DD
SFDR = 76dBc at f
IMD = -85dBc at f
ACLR = 73dB at f
10
11
12
13
14
15
16
17
PART
1
2
3
4
5
6
7
8
9
68
18
EP
19
67
20
66
65
21
64
22
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
63
23
Ordering Information
OUT
OUT
62
24
OUT
MAX5888
QFN
25
61
= 10MHz
26
= 61MHz
Pin Configuration
60
= 40MHz (to Nyquist)
59
27
28
58
29
57
30
56
31
55
PIN-
PACKAGE
68 QFN-EP*
68 QFN-EP*
32
Features
54
53
33
52
34
41
51
50
49
48
47
46
45
44
43
42
40
39
38
37
36
35
B11N
B11P
B12N
B12P
B13N
B13P
B14N
B14P
B15N
B15P
DGND
DV
SEL0
N.C.
N.C.
N.C.
N.C.
DD
1

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MAX5888AEGK+D Summary of contents

Page 1

... Communications: LMDS, MMDS, Point-to-Point Microwave Digital Signal Synthesis Automated Test Equipment (ATE) Instrumentation ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. o 500Msps Output Update Rate o Single 3.3V Supply Operation ...

Page 2

High Dynamic Performance DAC with Differential LVDS Inputs ABSOLUTE MAXIMUM RATINGS VCLK to AGND................................-0.3V to +3. VCLK to DGND ...............................-0.3V to +3. ...

Page 3

High Dynamic Performance DAC with Differential LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference analog output, 50Ω double terminated (Figure 7), ...

Page 4

High Dynamic Performance DAC with Differential LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference analog output, 50Ω double terminated (Figure 7), ...

Page 5

High Dynamic Performance DAC with Differential LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference analog output, 50Ω double terminated (Figure 7), ...

Page 6

High Dynamic Performance DAC with Differential LVDS Inputs ( VCLK = 3.3V, external reference SFDR vs. OUTPUT FREQUENCY (f = 200MHz -6dB FS) CLK OUT 100 I = 20mA ...

Page 7

High Dynamic Performance DAC with Differential LVDS Inputs PIN NAME 1 B3P Data Bit 3 2 B3N Complementary Data Bit 3 3 B2P Data Bit 2 4 B2N Complementary Data Bit 2 5 B1P Data Bit 1 ...

Page 8

High Dynamic Performance DAC with Differential LVDS Inputs PIN NAME 45 B14N Complementary Data Bit 14 46 B13P Data Bit 13 47 B13N Complementary Data Bit 13 48 B12P Data Bit 12 49 B12N Complementary Data Bit ...

Page 9

High Dynamic Performance DAC with Differential LVDS Inputs DV DD 1.2V REFERENCE REFIO REFADJ CLKN CLKP Figure 1. Simplified MAX5888 Block Diagram Table 1. I and R Selection Matrix Based on a Typical 1.200V Reference Voltage OUT ...

Page 10

High Dynamic Performance DAC with Differential LVDS Inputs 1.2V REFERENCE 10kΩ REFIO 0.1µF FSADJ CURRENT-STEERING I REF R SET DACREF REF REFIO SET Figure 2. Reference Architecture, Internal Reference Configuration operation IOUTP should ...

Page 11

High Dynamic Performance DAC with Differential LVDS Inputs DIGITAL DATA IS LATCHED ON THE RISING EDGE OF CLKP B0 TO B15 SETUP CLKP CLKN IOUT Figure 5. Detailed Timing Relationship ...

Page 12

High Dynamic Performance DAC with Differential LVDS Inputs AV DD B0–B15 16 AGND Figure 7. Differential to Single-Ended Conversion Using a Wideband RF Transformer AV DV VCLK DD DD IOUTP B0–B15 MAX5888 IOUTN 16 AGND DGND CLKGND ...

Page 13

High Dynamic Performance DAC with Differential LVDS Inputs carriers spread their IM products over a bandwidth of 20MHz on either side of the 20MHz total carrier band- width. In this four-carrier scenario, only the energy in the ...

Page 14

High Dynamic Performance DAC with Differential LVDS Inputs The number of carriers and their signal levels with respect to the full scale of the DAC are important as well. Unlike a full-scale sine wave, the inherent nature ...

Page 15

High Dynamic Performance DAC with Differential LVDS Inputs O MEASUREMENT BANDWIDTH -30 30kHz 100kHz -60 -70 -73 -75 -80 -90 0.2 0.4 0.6 1.2 1.8 FREQUENCY OFFSET FROM CARRIER (MHz) Figure 11. GSM/EDGE Tx Mask Grounding, Bypassing, ...

Page 16

High Dynamic Performance DAC with Differential LVDS Inputs The MAX5888 is packaged in a 68-lead QFN-EP package (package code: G6800-4), providing greater design flexibility, increased thermal efficiency**, and optimized AC performance of the DAC. The exposed pad ...

Page 17

High Dynamic Performance DAC with Differential LVDS Inputs The offset error is the difference between the ideal and the actual offset current. For a DAC, the offset point is the value at the output for the two ...

Page 18

... Maxim reserves the right to change the circuitry and specifications without notice at any time. implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © ...

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