LTC2629IGN#TRPBF Linear Technology, LTC2629IGN#TRPBF Datasheet

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LTC2629IGN#TRPBF

Manufacturer Part Number
LTC2629IGN#TRPBF
Description
IC DAC 12BIT R-R QUAD 16SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2629IGN#TRPBF

Settling Time
7µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
4
Voltage Supply Source
Single Supply
Power Dissipation (max)
750µW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LT
Quantity:
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applications
Block Diagram
Features
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Smallest Pin-Compatible Quad DACs:
LTC2609: 16 Bits
LTC2619: 14 Bits
LTC2629: 12 Bits
Guaranteed Monotonic Over Temperature
Separate Reference Inputs
27 Selectable Addresses
400kHz I
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 250µA per DAC at 3V
Individual Channel Power Down to 1µA (Max)
High Rail-to-Rail Output Drive (±15mA, Min)
Ultralow Crosstalk Between DACs (5µV)
LTC2609/LTC2619/LTC2629: Power-On Reset to
Zero-Scale
LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset
to Mid-Scale
Tiny 16-Lead Narrow SSOP Package
Mobile Communications
Process Control and Industrial Automation
Automatic Test Equipment and Instrumentation
3
4
5
6
8
9
REFA
V
V
REFB
SCL
SDA
OUTA
OUTB
2
C ™ Interface
DAC A
DAC B
REFLO
2
32-BIT SHIFT REGISTER
INTERFACE
I
GND
2
C
1
CONTROL
LOGIC
V
CC
16
ADDRESS
DECODE
LOGIC
DAC D
DAC C
Description
The LTC
bit, 2.7V to 5.5V rail-to-rail voltage output DACs in a 16-lead
SSOP package. They have built-in high performance output
buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply, volt-
age-output DACs.
The parts use a 2-wire, I
LTC2609/LTC2619/LTC2629 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock
rate of 400kHz).
The LTC2609/LTC2619/LTC2629 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero-scale; after power-up, they stay at
zero-scale until a valid write and update take place. The
power-on reset circuit resets the LTC2609-1/LTC2619-1/
LTC2629-1 to mid-scale. The voltage outputs stay at mid-
scale until a valid write and update take place.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5396245. Patent pending.
LTC2609/LTC2619/LTC2629
V
V
REFD
REFC
OUTD
OUTC
CA0
CA1
CA2
11
10
15
14
13
12
7
2609 BD
®
2609/LTC2619/LTC2629 are quad 16-, 14- and 12-
Rail-to-Rail DACs with
Quad 16-/14-/12-Bit
–0.2
–0.4
–0.6
–0.8
–1.0
1.0
0.8
0.6
0.4
0.2
0
0
2
V
V
C compatible serial interface. The
Differential Nonlinearity
CC
REF
= 5V
= 4.096V
16384
I
2
(LTC2609)
C Interface
32768
CODE
49152
2609 G02
65535
26091929fb


Related parts for LTC2629IGN#TRPBF

LTC2629IGN#TRPBF Summary of contents

Page 1

... LTC2629-1 to mid-scale. The voltage outputs stay at mid- scale until a valid write and update take place. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5396245. Patent pending. ...

Page 2

... LTC2629CGN#PBF LTC2629CGN#TRPBF LTC2629CGN-1#PBF LTC2629CGN-1#TRPBF LTC2629IGN#PBF LTC2629IGN#TRPBF LTC2629IGN-1#PBF LTC2629IGN-1#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: For more information on tape and reel specifications, go to: ...

Page 3

T REFC = REFD = 2.048V (V = 2.7V). REFLO = 0V SYMBOL PARAMETER CONDITIONS DC Performance Resolution Monotonicity (Note 2) DNL Differential Nonlinearity (Note 2) INL Integral Nonlinearity (Note ...

Page 4

LTC2609/LTC2619/LTC2629 electrical characteristics temperature range, otherwise specifications are at T REFC = REFD = 2.048V (V = 2.7V). REFLO = 0V Digital I/O (Note 9) V Low Level Input Voltage IL (SDA and SCL) V High Level Input ...

Page 5

T A SYMBOL PARAMETER V = 2. SCL Clock Frequency SCL t Hold Time (Repeated) Start Condition HD(STA) t Low Period of the SCL Clock Pin LOW t High ...

Page 6

LTC2609/LTC2619/LTC2629 typical perFormance characteristics LTC2609 Integral Nonlinearity (INL 4.096V REF –8 –16 –24 –32 0 16384 32768 49152 65535 CODE 2609 G01 DNL vs Temperature 1 ...

Page 7

LTC2619 Integral Nonlinearity (INL 4.096V REF –2 –4 –6 –8 0 4096 8192 12288 16383 CODE 2609 G09 LTC2629 Integral Nonlinearity (INL) 2 ...

Page 8

LTC2609/LTC2619/LTC2629 typical perFormance characteristics LTC2609/LTC2619/LTC2629 Current Limiting 0.10 CODE = MID-SCALE 0. REF CC 0. REF CC 0.04 0.02 0 –0. REF CC –0.04 V ...

Page 9

LTC2609/LTC2619/LTC2629 Large-Signal Response V OUT 0.5V/DIV REF CC 1/4 SCALE TO 3/4 SCALE 2609 G23 2.5µs/DIV Headroom at Rails vs Output Current 5.0 5V SOURCING 4.5 4.0 3.5 3V SOURCING 3.0 2.5 ...

Page 10

LTC2609/LTC2619/LTC2629 typical perFormance characteristics LTC2609/LTC2619/LTC2629 Multiplying Bandwidth 0 –3 –6 –9 –12 –15 –18 –21 –24 – (DC –30 REF V (AC) = 0.2V REF P-P –33 CODE = FULL SCALE –36 1k ...

Page 11

Functions GND (Pin 1): Analog Ground. REFLO (Pin 2): Reference Low. The voltage at this pin sets the zero-scale (ZS) voltage of all DACs. This pin can be raised above ground at V above ground at ...

Page 12

LTC2609/LTC2619/LTC2629 Block Diagram REFA 3 V OUTA DAC OUTB DAC B 5 REFB 6 SCL 8 SDA REFLO GND V CC CONTROL LOGIC 32-BIT SHIFT REGISTER INTERFACE REFD 15 ...

Page 13

Test Circuit 1 100 V /V IH(CAn) IL(CAn) timing Diagram SDA LOW r SCL t HD(STA HD(DAT) ALL VOLTAGE LEVELS REFER TO V LTC2609/LTC2619/LTC2629 CAn SU(DAT) t HD(STA) t ...

Page 14

LTC2609/LTC2619/LTC2629 operation Power-On Reset The LTC2609/LTC2619/LTC2629 clear the outputs to zero-scale when power is first applied, making system initialization consistent and repeatable. The LTC2609-1/ LTC2619-1/LTC2629-1 set the voltage outputs to mid-scale when power is first applied. For some applications, downstream ...

Page 15

Acknowledge clock pulse so that it remains a stable LOW during the HIGH period of this clock pulse. The LTC2609/LTC2619/LTC2629 respond to a write by a master in this manner. The LTC2609/LTC2619/LTC2629 do not acknowledge a read ...

Page 16

LTC2609/LTC2619/LTC2629 operation Write Word Protocol for LTC2609/LTC2619/LTC1629 S SLAVE ADDRESS Input Word (LTC2609 1ST DATA BYTE Input Word (LTC2619 1ST DATA BYTE Input Word (LTC2629 ...

Page 17

DAC amplifiers and reference inputs. In this case, the power-up delay time is 12µs (for V = 5V) or 30µs (for ...

Page 18

LTC2609/LTC2619/LTC2629 operation  26091929fb ...

Page 19

LTC2609/LTC2619/LTC2629 26091929fb  ...

Page 20

... GND GND Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. REFA REFB REFC JP3 ...

Page 21

REV DATE DESCRIPTION A 11/09 Update Manufacturer’s Information on Typical Application Revise Receiver Input Hysteresis Conditions Revise Block Diagram Revise Figure 1. Update Manufacturer’s Information on Figure 10 Update Tables 1 and 3 B 3/10 Revised C- and ...

Page 22

... GN16 (SSOP) 0204 (0.635) BSC = 4.5V to 5.5V 4.096V CC OUT = 2.7V to 5.5V 2.5V CC OUT = 5V(3V), Low Power, Deglitched OUT = 2.7V to 5.5V, Micropower, Rail-to-Rail Output LT 0310 REV B • PRINTED IN USA  LINEAR TECHNOLOGY CORPORATION 2005 26091929fb ...

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