AD9708ARU Analog Devices Inc, AD9708ARU Datasheet - Page 7

• Manufacturer Part Number: AD9708ARU
• Description: IC DAC 8BIT 100MSPS 28-TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9708ARU

• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 175mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• For Use With: AD9708-EBZ - BOARD EVAL FOR AD9708

FUNCTIONAL DESCRIPTION
Figure 12 shows a simplified block diagram of the AD9708. The
AD9708 consists of a large PMOS current source array capable of
providing up to 20 mA of total current. The array is divided into
31 equal currents that make up the five most significant bits
(MSBs). The remaining 3 LSBs are also implemented with equally
weighted current sources whose sum total equals 7/8th of an
MSB current source. Implementing the upper and lower bits
with current sources helps maintain the DAC’s high output
impedance (i.e. > 100 k ). All of these current sources are
switched to one or the other of the two output nodes (i.e., IOUTA
or IOUTB) via PMOS differential current switches. The switches
are based on a new architecture that drastically improves
distortion performance.
The analog and digital sections of the AD9708 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 2.7 volt to 5.5 volt range. The digital section,
which is capable of operating up to a 125 MSPS clock rate,
consists of edge-triggered latches and segment decoding logic
circuitry. The analog section includes the PMOS current
sources, the associated differential switches, a 1.20 V bandgap
voltage reference and a reference control amplifier.
The full-scale output current is regulated by the reference con-
trol amplifier and can be set from 2 mA to 20 mA via an exter-
nal resistor, R
both the reference control amplifier and voltage reference
V
the segmented current sources with the proper scaling factor.
The full-scale current, I
DAC TRANSFER FUNCTION
The AD9708 provides complementary current outputs, IOUTA
and IOUTB. IOUTA will provide a near full-scale current output,
I
IOUTB, the complementary output, provides no current. The
current output appearing at IOUTA and IOUTB are a function
of both the input code and I
where DAC CODE = 0 to 255 (i.e., Decimal Representation).
REV. B
OUTFS
REFIO
, sets the reference current I
, when all bits are high (i.e., DAC CODE = 255), while
I
OUTB
I
OUTA
SET
= (255 – DAC CODE)/256
0.1 F
. The external resistor, in combination with
= (DAC CODE/256)
OUTFS
R
V
2k
REFIO
SET
CLOCK
, is thirty-two times the value of I
OUTFS
+5V
I
REF
and can be expressed as:
REF
, which is mirrored over to
REFIO
FS ADJ
CLOCK
I
DVDD
DCOM
+1.20V REF
OUTFS
SLEEP
I
OUTFS
Figure 12. Functional Block Diagram
REFLO
50pF
COMP1
DIGITAL DATA INPUTS (DB7–DB0)
REF
(1)
(2)
.
0.1 F
CURRENT
SEGMENTED
SOURCE
–7–
LATCHES
SWITCHES
ARRAY
+5V
As previously mentioned, I
current I
V
where
The two current outputs will typically drive a resistive load
directly. If dc coupling is required, IOUTA and IOUTB should
be directly connected to matching resistive loads, R
are tied to analog common, ACOM. Note, R
sent the equivalent load resistance seen by IOUTA or IOUTB
as would be the case in a doubly terminated 50
The single-ended voltage output appearing at the IOUTA and
IOUTB nodes is simply:
Note the full-scale value of V
the specified output compliance range to maintain specified
distortion and linearity performance.
The differential voltage, V
IOUTB is:
Substituting the values of I
expressed as:
VOLTAGE REFERENCE AND CONTROL AMPLIFIER
The AD9708 contains an internal 1.20 V bandgap reference
that can be easily disabled and overridden by an external refer-
ence. REFIO serves as either an input or output depending on
whether the internal or an external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 13, the internal
reference is activated and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 F or greater from REFIO
to REFLO. Note that REFIO is not designed to drive any ex-
ternal load. It should be buffered with an external amplifier
having an input bias current less than 100 nA if any additional
loading is required.
AVDD
REFIO
V
DIFF
AD9708
and external resistor R
ACOM
= {(2 DAC CODE – 255)/256}/
REF
V
, which is nominally set by a reference voltage
COMP2
DIFF
IOUTA
IOUTB
V
I
V
OUTFS
OUTB
= (I
OUTA
I
REF
0.1 F
OUTA
I
= I
= 32
= V
= I
OUTB
I
OUTB
OUTA
OUTA
DIFF
– I
REFIO
OUTA
V
OUTFS
V
REFIO
OUTA
OUTB
DIFF
SET
I
, appearing across IOUTA and
REF
/R
, I
= V
R
. It can be expressed as:
R
R
50
V
)
SET
OUTB
LOAD
OUTB
LOAD
is a function of the reference
LOAD
and V
OUTA
R
– V
, and I
LOAD
OUTB
OUTB
R
50
(32 R
V
LOAD
OUTA
REF
LOAD
should not exceed
AD9708
; V
LOAD
or 75
may repre-
LOAD
DIFF
/R
SET
can be
, which
)
cable.
(3)
(4)
(5)
(6)
(7)
(8)