AD9708ARU Analog Devices Inc, AD9708ARU Datasheet - Page 8

• Manufacturer Part Number: AD9708ARU
• Description: IC DAC 8BIT 100MSPS 28-TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9708ARU

• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 175mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• For Use With: AD9708-EBZ - BOARD EVAL FOR AD9708

AD9708
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external reference may then be applied
to REFIO as shown in Figure 14. The external reference may
provide either a fixed reference voltage to enhance accuracy and
drift performance or a varying reference voltage for gain control.
Note that the 0.1 F compensation capacitor is not required
since the internal reference is disabled, and the high input
impedance (i.e., 1 M ) of REFIO minimizes any loading of the
external reference.
The AD9708 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
The control amplifier is configured as a V-I converter, as shown
in Figure 14, such that its current output, I
the ratio of the V
in Equation 4. The control amplifier allows a wide (10:1)
adjustment span of I
I
I
relates directly to the power dissipation of the AD9708, which is
proportional to I
section). The second benefit relates to the 20 dB adjustment,
which is useful for system gain control purposes.
REF
OUTFS
ADDITIONAL
EXTERNAL
between 62.5 A and 625 A. The wide adjustment span of
AVDD
REF
LOAD
provides several application benefits. The first benefit
Figure 14. External Reference Configuration
Figure 13. Internal Reference Configuration
R
REF BUFFER
SET
EXTERNAL
OPTIONAL
OUTFS
REFIO
V
I
V
REFIO
REF
REFIO
OUTFS
=
0.1 F
2k
and an external resistor, R
/R
(refer to the POWER DISSIPATION
AD1580
SET
over a 2 mA to 20 mA range by setting
1.2V
REFIO
FS ADJ
REFIO
FS ADJ
+1.2V REF
AVDD
+1.2V REF
AD9708
AD9708
REFLO
REFLO
OUT2
OUT1
Figure 15. Single-Supply Gain Control Circuit
REF
50pF
AGND
R
50pF
AD7524
FB
, is determined by
REFERENCE
CONTROL
AMPLIFIER
COMP1
SET
0.1 F
COMP1
DB7–DB0
0.1 F
CURRENT
SOURCE
, as stated
ARRAY
CURRENT
AVDD
V
SOURCE
ARRAY
DD
OUTFS
V
+5V
AVDD
REF
AVDD
.
R
SET
0.1V TO 1.2V
–8–
I
V
REF
REF
The small signal bandwidth of the reference control amplifier is
approximately 1.8 MHz and can be reduced by connecting an
external capacitor between COMP1 and AVDD. The output of
the control amplifier, COMP1, is internally compensated via a
50 pF capacitor that limits the control amplifier small-signal
bandwidth and reduces its output impedance. Any additional
external capacitance further limits the bandwidth and acts as
a filter to reduce the noise contribution from the reference
amplifier. If I
capacitor is recommended.
I
reference and varying the common-mode voltage over its
compliance range of 1.25 V to 0.10 V. REFIO can be driven by
a single-supply amplifier or DAC, thus allowing I
ied for a fixed R
approximately 1 M , a simple R-2R ladder DAC configured in
the voltage mode topology may be used to control the gain. This
circuit is shown in Figure 15 using the AD7524 and an external
1.2 V reference, the AD1580. Note another AD9708 could also
be used as the gain control DAC since it can also provide a
programmable unipolar output up to 1.2 V.
ANALOG OUTPUTS AND OUTPUT CONFIGURATIONS
The AD9708 produces two complementary current outputs,
I
single-ended voltage outputs, V
R
section. Figure 16 shows the AD9708 configured to provide a
positive unipolar output range of approximately 0 V to +0.5 V
for a double terminated 50
current, I
equivalent load resistance seen by IOUTA or IOUTB and is
equal to 25 . The unused output (IOUTA or IOUTB) can be
connected to ACOM directly or via a matching R
values of I
tive compliance range is adhered to.
Alternatively, an amplifier could be configured as an I-V converter
thus converting IOUTA or IOUTB into a negative unipolar
=
/R
REF
OUTA
LOAD
SET
Figure 16. 0 V to +0.5 V Unbuffered Voltage Output
can be varied for a fixed R
, as described in the DAC TRANSFER FUNCTION
and I
REFIO
FS ADJ
AD9708
+1.2V REF
AD9708
OUTFS
OUTFS
OUTB
IOUTA
IOUTB
REFLO
REF
BANDLIMITING
, of 20 mA. In this case, R
SET
CAPACITOR
, which may be converted into complementary
and R
OPTIONAL
is fixed for an application, a 0.1 F ceramic chip
22
21
. Since the input impedance of REFIO is
I
OUTFS
50pF
LOAD
= 20mA
25
COMP1
can be selected as long as the posi-
cable for a nominal full-scale
CURRENT
OUTA
SOURCE
SET
ARRAY
AVDD
50
AVDD
by disabling the internal
and V
OUTB
LOAD
V
OUTA
, via a load resistor,
represents the
50
REF
= 0 TO +0.5V
LOAD
to be var-
. Different
REV. B