AD9709ASTZ Analog Devices Inc, AD9709ASTZ Datasheet

IC DAC 8BIT DUAL 125MSPS 48-LQFP

AD9709ASTZ

Manufacturer Part Number
AD9709ASTZ
Description
IC DAC 8BIT DUAL 125MSPS 48-LQFP
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Datasheet

Specifications of AD9709ASTZ

Data Interface
Parallel
Settling Time
35ns
Number Of Bits
8
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
450mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
8bit
Sampling Rate
125MSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
3V To 5.5V
Supply Voltage Range - Digital
2.7V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9709-EBZ - BOARD EVAL FOR AD9709
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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FEATURES
8-bit dual transmit digital-to-analog converter (DAC)
125 MSPS update rate
Excellent SFDR to Nyquist @ 5 MHz output: 66 dBc
Excellent gain and offset matching: 0.1%
Fully independent or single-resistor gain control
Dual port or interleaved data
On-chip 1.2 V reference
Single 5 V or 3.3 V supply operation
Power dissipation: 380 mW @ 5 V
Power-down mode: 50 mW @ 5 V
48-lead LQFP
APPLICATIONS
Communications
Base stations
Digital synthesis
Quadrature modulation
3D ultrasound
GENERAL DESCRIPTION
The AD9709
DAC. It integrates two high quality 8-bit TxDAC+® cores, a voltage
reference, and digital interface circuitry into a small 48-lead LQFP
package. The AD9709 offers exceptional ac and dc performance
while supporting update rates of up to 125 MSPS.
The AD9709 has been optimized for processing I and Q data in
communications applications. The digital interface consists of two
double-buffered latches as well as control logic. Separate write
inputs allow data to be written to the two DAC ports independent
of one another. Separate clocks control the update rate of the DACs.
A mode control pin allows the AD9709 to interface to two separate
data ports, or to a single interleaved high speed data port. In inter-
leaving mode, the input data stream is demuxed into its original
I and Q data and then latched. The I and Q data is then converted
by the two DACs and updated at half the input data rate.
The GAINCTRL pin allows two modes for setting the full-scale
current (I
independently using two external resistors, or I
DACs can be set by using a single external resistor. See the Gain
Control Mode section for important date code information on
this feature.
The DACs utilize a segmented current source architecture
combined with a proprietary switching technique to reduce
1
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Patent pending.
OUTFS
1
is a dual-port, high speed, 2-channel, 8-bit CMOS
) of the two DACs. I
OUTFS
for each DAC can be set
OUTFS
for both
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
8-Bit, 125 MSPS, Dual TxDAC+
glitch energy and to maximize dynamic accuracy. Each DAC
provides differential current output, thus supporting single-
ended or differential applications. Both DACs can be
simultaneously updated and provide a nominal full-scale
current of 20 mA. The full-scale currents between each DAC
are matched to within 0.1%.
The AD9709 is manufactured on an advanced low-cost CMOS
process. It operates from a single supply of 3.3 V or 5 V and
consumes 380 mW of power.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
WRT1/IQWRT
WRT2/IQSEL
Digital-to-Analog Converter
The AD9709 is a member of a pin-compatible family of
dual TxDACs providing 8-, 10-, 12-, and 14-bit resolution.
Dual 8-Bit, 125 MSPS DACs. A pair of high performance
DACs optimized for low distortion performance provide
for flexible transmission of I and Q information.
Matching. Gain matching is typically 0.1% of full scale, and
offset error is better than 0.02%.
Low Power. Complete CMOS dual DAC function operates
at 380 mW from a 3.3 V or 5 V single supply. The DAC
full-scale current can be reduced for lower power operation,
and a sleep mode is provided for low power idle periods.
On-Chip Voltage Reference. The AD9709 includes a 1.20 V
temperature-compensated band gap voltage reference.
Dual 8-Bit Inputs. The AD9709 features a flexible dual-
port interface, allowing dual or interleaved input data.
PORT1
PORT2
FUNCTIONAL BLOCK DIAGRAM
DVDD1/
DVDD2
INTERFACE
DIGITAL
MODE
©2000–2009 Analog Devices, Inc. All rights reserved.
DCOM1/
DCOM2
AVDD
AD9709
Figure 1.
LATCH
LATCH
1
2
ACOM
CLK2/IQ RESET
GENERATOR
REFERENCE
CLK1
DAC
DAC
BIAS
1
2
AD9709
www.analog.com
I
I
REFIO
FSADJ1
FSADJ2
GAINCTRL
SLEEP
I
I
OUTA1
OUTB1
OUTA2
OUTB2

Related parts for AD9709ASTZ

AD9709ASTZ Summary of contents

Page 1

FEATURES 8-bit dual transmit digital-to-analog converter (DAC) 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 66 dBc Excellent gain and offset matching: 0.1% Fully independent or single-resistor gain control Dual port or interleaved data On-chip 1.2 ...

Page 2

AD9709 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 DC Specifications ......................................................................... 3 Dynamic Specifications ............................................................... 4 Digital Specifications ...

Page 3

SPECIFICATIONS DC SPECIFICATIONS AVDD = 3 DVDD1 = DVDD2 = 3 MIN MAX Table 1. Parameter RESOLUTION 1 DC ACCURACY Integral Linearity Error (INL) Differential Nonlinearity (DNL) ...

Page 4

AD9709 DYNAMIC SPECIFICATIONS AVDD = 3 DVDD1 = DVDD2 = 3 MIN MAX doubly terminated, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE Maximum Output Update Rate ...

Page 5

DIGITAL SPECIFICATIONS AVDD = 3 DVDD1 = DVDD2 = 3 MIN MAX Table 3. Parameter DIGITAL INPUTS Logic 1 Voltage @ DVDD1 = DVDD2 = 5 V ...

Page 6

AD9709 ABSOLUTE MAXIMUM RATINGS Table 4. With Parameter Respect To AVDD ACOM DVDD1, DVDD2 DCOM1/DCOM2 ACOM DCOM1/DCOM2 AVDD DVDD1/DVDD2 MODE, CLK1/IQCLK, DCOM1/DCOM2 CLK2/IQRESET, WRT1/IQWRT, WRT2/IQSEL Digital Inputs DCOM1/DCOM2 ACOM OUTA1 OUTA2 I /I OUTB1 OUTB2 REFIO, FSADJ1, ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DB7P1 (MSB CONNECT Table 6. Pin Function Descriptions Pin No. Mnemonic DB7P1 to DB0P1 15, 21 DCOM1, DCOM2 16, 22 DVDD1, DVDD2 ...

Page 8

AD9709 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = 3 DVDD = 3 unless otherwise noted 5MSPS CLK 65MSPS 55 CLK f = 125MSPS CLK 50 45 0.1 1 ...

Page 9

A (dBFS) OUT Figure 10. Single-Tone SFDR vs OUT OUT 75 70 5MSPS/1.0MHz 65 ...

Page 10

AD9709 10MHz OUT 25MHz OUT 40MHz OUT 60MHz OUT 50 45 –50 –30 – TEMPERATURE (°C) Figure 16. SFDR vs. Temperature @ f CLK 0.05 ...

Page 11

TERMINOLOGY Linearity Error (Integral Nonlinearity or INL) Linearity error is defined as the maximum deviation of the actual analog output from the ideal output, determined by a straight line drawn from zero to full-scale. Differential Nonlinearity (DNL) DNL is the ...

Page 12

AD9709 THEORY OF OPERATION FSADJ1 R 1 SET REFIO 2kΩ 0.1µF FSADJ2 R 2 SET 2kΩ 1.2V REF WRT1/ GAINCTRL IQWRT DVDD1/DVDD2 50Ω DCOM1/DCOM2 RETIMED CLOCK OUTPUT* LECROY 9210 PULSE GENERATOR Figure 21. Basic AC Characterization Test Setup for AD9709, ...

Page 13

The full-scale output current of each DAC is regulated by separate reference control amplifiers and can be set from via an external network connected to the full-scale adjust (FSADJ) pin. The external network in combination ...

Page 14

AD9709 DAC TRANSFER FUNCTION Both DACs in the AD9709 provide complementary current out- puts, I and provides a near full-scale current OUTA OUTB OUTA output when all bits are high (that is, DAC CODE = ...

Page 15

DIGITAL INPUTS The digital inputs of the AD9709 consist of two independent channels. For the dual port mode, each DAC has its own dedicated 8-bit data port: WRT line and CLK line. In the interleaved timing mode, the function of ...

Page 16

AD9709 Timing specifications for interleaved mode are shown in Figure 28 and Figure 30. The digital inputs are CMOS compatible with logic thresholds set to approximately half the digital positive supply THRESHOLD (DVDDx DVDDx/2 (±20%) ...

Page 17

Digital signal paths should be kept short, and run lengths should be matched to avoid propagation delay mismatch. The insertion of a low value (that is, 20 Ω to 100 Ω) resistor network between the AD9709 digital inputs and driver ...

Page 18

AD9709 SLEEP MODE OPERATION The AD9709 has a power-down function that turns off the output current and reduces the supply current to less than 8.5 mA over the specified supply range of 3 and temperature range. ...

Page 19

APPLYING THE AD9709 OUTPUT CONFIGURATIONS The following sections illustrate some typical output configura- tions for the AD9709. Unless otherwise noted assumed that I is set to a nominal 20 mA. For applications requiring the OUTFS optimum dynamic performance, ...

Page 20

AD9709 SINGLE-ENDED, UNBUFFERED VOLTAGE OUTPUT Figure 39 shows the AD9709 configured to provide a unipolar output range of approximately 0.5 V for a doubly terminated 50 Ω cable, because the nominal full-scale current, I flows through the ...

Page 21

An example serves to illustrate the effect of supply noise on the analog supply. Suppose a switching regulator with a switching frequency of 250 kHz produces noise and, for simplicity’s sake, all of this noise is concentrated ...

Page 22

AD9709 APPLICATIONS INFORMATION QUADRATURE AMPLITUDE MODULATION (QAM) USING THE AD9709 QAM is one of the most widely used digital modulation schemes in digital communications systems. This modulation technique can be found in FDM as well as spread spectrum (that is, ...

Page 23

I and Q digital data can be fed into the AD9709 in two ways. In dual port mode, the digital I information drives one input port, and the digital Q information drives the other input port interpolation filter ...

Page 24

AD9709 EVALUATION BOARD GENERAL DESCRIPTION The AD9709- evaluation board for the AD9709 8-bit dual DAC. Careful attention to layout and circuit design, combined with a prototyping area, allow the user to easily and effectively evaluate the AD9709 in ...

Page 25

CC0805 CC0805 Figure 47. Power Decoupling and Clocks on AD9709 Evaluation Board (2) Rev Page RC0603 RC0805 RC0805 RC0805 RC0805 RC0805 AD9709 00606-147 ...

Page 26

AD9709 L6 O2N LC0805 CC0805 C24 L5 DNP O2P LC0805 AVDD2 C20 CC0603 10UF BCASE C27 10V 100PF 2 L4 O1N LC0805 DNP CC0805 O1P LC0805 DNP R23 51 C31 RC0603 D N ...

Page 27

RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RIBBON RA Figure 49. Digital Input Signaling (1) Rev Page AD9709 00606-149 ...

Page 28

AD9709 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RIBBON RA Figure 50. Digital Input Signaling (2) Rev Page 00606-150 ...

Page 29

CC0805 CC0805 RC07CUP RC0805 RC0805 Figure 51. Device Under Test/Analog Output Signal Conditioning Rev Page RC07CUP RC0805 RC0805 AD9709 00606-151 ...

Page 30

AD9709 EVALUATION BOARD LAYOUT Figure 52. Assembly, Top Side Rev Page ...

Page 31

Figure 53. Assembly, Bottom Side Rev Page AD9709 ...

Page 32

... ROTATED 90° CCW ORDERING GUIDE Model Temperature Range AD9709ASTZ 1 –40°C to +85°C 1 AD9709ASTZRL –40°C to +85°C 1 AD9709-EBZ RoHS Compliant Part. ©2000–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 0.75 1 ...

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