LTC2954ITS8-2#PBF Linear Technology, LTC2954ITS8-2#PBF Datasheet - Page 12

LTC2954ITS8-2#PBF

Manufacturer Part Number
LTC2954ITS8-2#PBF
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2954ITS8-2#PBF

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Rad Hardened
No
Lead Free Status / Rohs Status
Compliant

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LTC2954
APPLICATIO S I FOR ATIO
12
LTC2954-1, LTC2954-2 Versions
The LTC2954-1 (high true EN) and LTC2954-2 (low true
⎯ E ⎯ N ) differ only by the polarity of the high voltage (33V ABS
MAX), enable pin. The LTC2954-1 EN pin is a low leakage
high true open drain output designed to drive the shutdown
pin of DC/DC converters. The LTC2954-2 is a low leakage,
low true open drain enable output designed to drive the
gate of an external PFET. The LTC2954-2 provides a user
manual power path control.
High Voltage Pins
The V
26.4V. ⎯ P ⎯ B can, additionally, operate below ground (–6V)
TYPICAL APPLICATIO S
Voltage Monitoring with ⎯ K ⎯ I ⎯ L ⎯ L Input
The ⎯ K ⎯ I ⎯ L ⎯ L pin can be used as a voltage monitor. Figure
5 shows an application where the ⎯ K ⎯ I ⎯ L ⎯ L pin has a dual
function. It is driven by a low leakage open drain output
of the µP. It is also connected to a resistive divider that
monitors battery voltage (V
falls below the set value, the voltage at the ⎯ K ⎯ I ⎯ L ⎯ L pin falls
below 0.6V and the EN pin is quickly pulled low. Note that
the resistor values should be as large as possible, but
small enough to keep leakage currents from tripping the
0.6V ⎯ K ⎯ I ⎯ L ⎯ L comparator.
0.1µF
C4
V
IN
IN
Figure 5. Input Voltage Monitoring with ⎯ K ⎯ I ⎯ L ⎯ L Input
, ⎯ P ⎯ B and EN/ ⎯ E ⎯ N pins can operate at voltages up to
= 9V
V
PB
GND ONT
IN
806k
100k
1%
1%
R3
R2
LTC2954-1
U
C
0.033µF
ONT
*
PDT
KILL
INT
EN
U
IN
C
1µF
). When the battery voltage
PDT
*
U
*OPTIONAL
W
V
SHDN
IN
LT1767-3.3
R1
10k
V
OUT
INT
KILL
(OPEN DRAIN)
U
µP
2954 F05
3.3V
without latching up the device. ⎯ P ⎯ B has an ESD HBM rating
of ±10kV. If the push button switch connected to ⎯ P ⎯ B exhib-
its high leakage current, then an external pull-up resistor
to V
switch is physically located far from the LTC2954 ⎯ P ⎯ B pin,
parasitic capacitances may couple onto the high imped-
ance ⎯ P ⎯ B input. Additionally, parasitic series inductance
may cause unpredictable ringing at the ⎯ P ⎯ B pin. Placing a
5.1k resistor from the ⎯ P ⎯ B pin to the push button switch
would mitigate parasitic inductance problems. Placing a
0.1µF capacitor on the ⎯ P ⎯ B pin would lessen the impact of
parasitic capacitive coupling.
The DC/DC converter shown has an internal pull-up cur-
rent on its ⎯ S ⎯ H ⎯ D ⎯ N pin. A pull-up resistor on EN is thus not
needed.
Operation Without µP
Figure 6 shows how to connect the ⎯ K ⎯ I ⎯ L ⎯ L pin when there
is no circuitry available to drive it. The minimum pulse
width detected is 30µs. If there are glitches on the resis-
tor pull-up voltage that are wider than 30µs and transition
below 0.6V, then an appropriate bypass capacitor should
be connected to the ⎯ K ⎯ I ⎯ L ⎯ L pin. The optional C
0.1µF
C4
IN
V
IN
is recommended. Furthermore, if the push button
= 9V
V
PB
GND ONT
IN
LTC2954-1
Figure 6. No µP Application
C
0.033µF
ONT
*
PDT
KILL
INT
EN
C
1µF
PDT
*
*OPTIONAL
V
SHDN
IN
LT1767-3.3
V
OUT
PDT
+
external
R1
100k
C3*
0.01µF
2954 F06
3.3V
2954fa

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