MT90820AP1 Zarlink, MT90820AP1 Datasheet - Page 13

• Manufacturer Part Number: MT90820AP1
• Description: PB FREE LARGE DIGITAL SWITCH
• Manufacturer: Zarlink

Notes:
1. Bit A7 must be high for access to data and connection memory positions. Bit A7 must be low for access to registers.
2. Channels 0 to 31 are used when serial interface is at 2 Mb/s mode.
3. Channels 0 to 63 are used when serial interface is at 4 Mb/s mode.
4. Channels 0 to 127 are used when serial interface is at 8 Mb/s mode.
(Note 1)
15 - 6
Bit
A7
OE bit in Connection
5
4
1
1
1
1
1
1
1
1
1
1
15
0
Read/Write Address:
Reset Value:
Memory
A6
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
14
Unused
0
Name
MBP
MS
13
A5
0
1
1
1
1
1
0
0
1
1
.
Table 4 - Internal Register and Address Memory Mapping
12
Must be zero for normal operation.
Memory Block Program. When 1, the connection memory block programming feature is
ready for the programming of Connection Memory high bits, bit 11 to bit 15. When 0, this
feature is disabled.
Memory Select. When 0, connection memory is selected for read or write operations. When 1,
the data memory is selected for read operations and connection memory is selected for write
operations. (No microprocessor write operation is allowed for the data memory.)
0
A4
0
0
1
1
0
0
1
1
.
.
11
0
Table 5 - Output High Impedance Control
Don’t Care
00
0000
ODE pin
A3
H
0
0
1
1
0
0
1
1
.
.
,
10
0
0
1
1
H
0
.
Zarlink Semiconductor Inc.
A2
9
0
0
0
1
1
0
0
1
1
.
.
MT90820
8
0
A1
0
0
1
1
0
0
1
1
OSB bit in IMS register
13
.
.
7
0
Don’t Care
A0
0
1
0
1
0
1
0
1
Description
.
.
6
0
0
1
0
1
Ch 32
Ch 33
.
Ch 62
Ch 63
Ch 64
Ch 65
.
Ch 126
Ch 127
MBP
5
MS
4
ST-BUS Output Driver Status
STA3
3
Location
High Impedance
High Impedance
STA2
2
Per Channel
Enable
Enable
Enable
STA1
1
(
Note 3)
(
Note 4)
Data Sheet
STA0
0