AD5530BRU Analog Devices Inc, AD5530BRU Datasheet - Page 17

• Manufacturer Part Number: AD5530BRU
• Description: IC DAC 12BIT SRL IN/VOUT 16TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5530BRU

• Rohs Status: RoHS non-compliant
• Settling Time: 20µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 60mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP

APPLICATIONS INFORMATION
OPTOCOUPLER INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD5530/
AD5531 makes it ideal for opto-isolated interfaces because the
number of interface lines is kept to a minimum.
shows a 4-channel isolated interface to the AD5530/AD5531.
To reduce the number of opto-isolators, if simultaneous
updating is not required, then the LDAC pin can be tied
permanently low.
DAISY-CHAINING INTERFACE WITH MULTIPLE AD5530s OR AD5531s
A number of these DAC parts can be daisy-chained together using the SDO pin. Figure 28 illustrates such a configuration.
SERIAL CLOCK OUT
µCONTROLLER
SERIAL DATA OUT
CONTROL OUT
SYNC OUT
Figure 26. Opto-Isolated Interface
SYNC
1
SCLK
SDIN
ADDITIONAL PINS OMITTED FOR CLARITY.
OPTOCOUPLER
AD5530/AD5531
SCLK
SDIN
SYNC
V
DD
V
CC
SDO
Figure 28. Daisy-Chaining Multiple AD5530/AD5531s
Figure 26
TO LDAC
TO SYNC
TO SCLK
TO SDIN
1
R
AD5530/AD5531
SCLK
SDIN
SYNC
Rev. B | Page 17 of 20
SDO
SERIAL INTERFACE TO MULTIPLE AD5530s OR
AD5531s
Figure 27 shows how the
AD5530/AD5531s. All devices receive the same serial clock and
serial data, but only one device receives the SYNC signal at any
one time. The DAC addressed is determined by the decoder.
There is some feedthrough from the digital input lines, the
effects of which can be minimized by using a burst clock.
ADDRESS
1
ENABLE
CODED
1
ADDITIONAL PINS
OMITTED FOR CLARITY.
R
AD5530/AD5531
SCLK
SDIN
SYNC
Figure 27. Addressing Multiple AD5530/AD5531s
DECODER
EN
DGND
V
CC
SCLK
SDIN
1
SDO
SYNC
1
TO OTHER
SERIAL DEVICES
pin is used to address multiple
R
AD5530/AD5531
AD5530/AD5531
AD5530/AD5531
AD5530/AD5531
AD5530/AD5531
SYNC
SDIN
SCLK
SYNC
SDIN
SCLK
SYNC
SDIN
SCLK
SYNC
SDIN
SCLK
V
V
V
V
OUT
OUT
OUT
OUT
1
1
1
1