ATF1504BE-7AU100 Atmel, ATF1504BE-7AU100 Datasheet - Page 6

IC CPLD 64MC 1.8V 100-TQFP

ATF1504BE-7AU100

Manufacturer Part Number
ATF1504BE-7AU100
Description
IC CPLD 64MC 1.8V 100-TQFP
Manufacturer
Atmel
Series
ATF1504BEr
Datasheet

Specifications of ATF1504BE-7AU100

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Macrocells
64
Number Of I /o
80
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Features
CMOS/TTL Compatible
Voltage
1.8V
Memory Type
CMOS
For Use With
ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-

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Figure 1-4.
1.1
1.2
6
Product Terms and Select Mux
OR/XOR/CASCADE Logic
ATF1504BE
ATF1504BE Macrocell
Each ATF1504BE macrocell has five product terms. Each product term receives as its inputs all
signals from the switch matrix and regional bus.
The product term select multiplexer (PTMUX) allocates the five product terms as needed to the
macrocell logic gates and control signals. The PTMUX configuration is determined by the design
compiler, which selects the optimum macrocell configuration.
The ATF1504BE’s logic structure is designed to efficiently support all types of logic. Within a sin-
gle macrocell, all the product terms can be routed to the OR gate, creating a 5-input AND/OR
sum term. With the addition of the CASIN from neighboring macrocells, this can be expanded to
as many as 40 product terms with minimal additional delay.
The macrocell’s XOR gate allows efficient implementation of compare and arithmetic functions.
One input to the XOR comes from the OR sum term. The other XOR input can be a product term
or a fixed high or low level. For combinatorial outputs, the fixed level input allows polarity selec-
tion. For registered functions, the fixed levels allow DeMorgan minimization of product terms.
BURIED FEEDBACK
TRIGGER
SCHMITT
SSTL
3637B–PLD–1/08

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