CY37032P44-125AXC Cypress Semiconductor Corp, CY37032P44-125AXC Datasheet - Page 11

• Manufacturer Part Number: CY37032P44-125AXC
• Description: IC CPLD 32 MACROCELL 44LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: Ultra37000™r

Specifications of CY37032P44-125AXC

• Number Of Macrocells: 32
• Package / Case: 44-LQFP
• Programmable Type: In-System Reprogrammable™ (ISR™) CMOS
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of I /o: 37
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Features: Programmable
• Voltage: 5V
• Memory Type: CMOS
• Number Of Product Terms Per Macro: 16
• Maximum Operating Frequency: 125 MHz
• Delay Time: 10 ns
• Number Of Programmable I/os: 37
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• No. Of Macrocells: 32
• No. Of I/o's: 37
• Propagation Delay: 6ns
• Frequency: 125MHz
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Family Name: Ultra 37000
• # Macrocells: 32
• Number Of Usable Gates: 960
• Frequency (max): 125MHz
• Propagation Delay Time: 10ns
• Number Of Logic Blocks/elements: 2
• # I/os (max): 37
• Operating Supply Voltage (typ): 5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2901; CY37032P44-125AXC

Document #: 38-03007 Rev. *E
Logic Block Diagrams
CY37256/CY37256V
TDI
TCK
TMS
JTAG Tap
Controller
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
12
24
36
48
60
72
84
0
−I/O
−I/O
−I/O
−I/O
−I/O
−I/O
−I/O
−I/O
23
35
47
59
71
83
95
11
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
(continued)
TDO
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
4
C
D
G
H
A
B
E
F
96
36
16
36
16
36
16
36
16
36
16
36
16
36
16
36
16
Input
1
PIM
Clock/
Input
4
16
36
16
36
16
36
16
36
16
36
16
36
16
36
16
36
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
BLOCK
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
96
O
M
P
N
L
K
J
I
4
Ultra37000 CPLD Family
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
12 I/Os
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
180
168
156
144
132
120
108
96
−I/O
−I/O
−I/O
−I/O
−I/O
−I/O
−I/O
−I/O
107
191
179
167
155
143
131
119
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