ATF1508ASV-15QC160 Atmel, ATF1508ASV-15QC160 Datasheet - Page 6

• Manufacturer Part Number: ATF1508ASV-15QC160
• Description: IC CPLD 128 MACROCELL LV 160PQFP
• Manufacturer: Atmel
• Series: ATF1508ASV(L)r

Specifications of ATF1508ASV-15QC160

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 15.0ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Macrocells: 128
• Number Of I /o: 96
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Voltage: 3.3V
• Memory Type: EEPROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Other names: ATF1508ASV15QC160

Extra Feedback
I/O Control
Global Bus/Switch Matrix
Foldback Bus
Open-collector Output Option
6
ATF1508ASV(L)
The ATF15xxSE Family macrocell output can be selected as registered or combinato-
rial. The extra buried feedback signal can be either combinatorial or a registered signal
regardless of whether the output is combinatorial or registered. (This enhancement
function is automatically implemented by the fitter software.) Feedback of a buried com-
binatorial output allows the creation of a second latch within a macrocell.
The output enable multiplexer (MOE) controls the output enable signal. Each I/O can be
individually configured as an input, output or for bi-directional operation. The output
enable for each macrocell can be selected from the true or compliment of the two output
enable pins, a subset of the I/O pins, or a subset of the I/O macrocells. This selection is
automatically done by the fitter software when the I/O is configured as an input, all mac-
rocell resources are still available, including the buried feedback, expander and cascade
logic.
The global bus contains all input and I/O pin signals as well as the buried feedback sig-
nal from all 128 macrocells. The switch matrix in each logic block receives as its inputs
all signals from the global bus. Under software control, up to 40 of these signals can be
selected as inputs to the logic block.
Each macrocell also generates a foldback product term. This signal goes to the regional
bus and is available to 16 macrocells. The foldback is an inverse polarity of one of the
macrocell’s product terms. The 16 foldback terms in each region allow generation of
high fan-in sum terms (up to 21 product terms) with little additional delay.
This option enables the device output to provide control signals such as an interrupt that
can be asserted by any of the several devices.
1408H–PLD–7/05