XC3S2000-5FGG676C Xilinx Inc, XC3S2000-5FGG676C Datasheet - Page 13

SPARTAN-3A FPGA 2M 676-FBGA

XC3S2000-5FGG676C

Manufacturer Part Number
XC3S2000-5FGG676C
Description
SPARTAN-3A FPGA 2M 676-FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet

Specifications of XC3S2000-5FGG676C

Total Ram Bits
737280
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
5120
Number Of I /o
489
Number Of Gates
2000000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
No. Of Logic Blocks
5120
No. Of Gates
2000000
No. Of Macrocells
46080
Family Type
Spartan-3
No. Of Speed Grades
5
No. Of I/o's
489
Clock
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S2000-5FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S2000-5FGG676C
Manufacturer:
XILINX
0
Part Number:
XC3S2000-5FGG676C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Company:
Part Number:
XC3S2000-5FGG676C
Quantity:
1 256
DS099-2 (v2.5) December 4, 2009
Product Specification
OTCLK1
OTCLK2
ICLK1
ICLK2
TCE
OCE
REV
ICE
IQ1
IQ2
T1
T2
SR
O1
O2
T
I
R
Note: All IOB signals originating from the FPGA's internal logic have an optional polarity inverter.
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
D
CE
CK
SR
SR
SR
SR
SR
SR
REV
REV
REV
REV
REV
REV
Q
Q
Q
Q
Q
Q
Figure 5: Simplified IOB Diagram
TFF1
TFF2
OFF1
OFF2
IFF1
IFF2
MUX
DDR
DDR
MUX
www.xilinx.com
Delay
Fixed
Delay
Fixed
Three-state Path
Output Path
Input Path
Spartan-3 FPGA Family: Functional Description
Program-
Output
mable
Driver
Single-ended Standards
LVCMOS, LVTTL, PCI
Differential Standards
using V REF
DCI
Pull-Up
Down
Pull-
Keeper
Latch
DS099-2_01_112905
ESD
ESD
V
Pin
I/O Pin
from
Adjacent
IOB
V
CCO
REF
I/O
Pin
13

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