XCV200E-6PQ240C Xilinx Inc, XCV200E-6PQ240C Datasheet - Page 81

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XCV200E-6PQ240C

Manufacturer Part Number
XCV200E-6PQ240C
Description
IC FPGA 1.8V C-TEMP 240-PQFP
Manufacturer
Xilinx Inc
Series
Virtex™-Er
Datasheet

Specifications of XCV200E-6PQ240C

Number Of Logic Elements/cells
5292
Number Of Labs/clbs
1176
Total Ram Bits
114688
Number Of I /o
158
Number Of Gates
306393
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Global Clock Set-Up and Hold for LVTTL Standard, without DLL
DS022-3 (v2.9.2) March 14, 2003
Production Product Specification
Notes:
1.
2.
3.
Input Setup and Hold Time Relative to Global Clock Input Signal
for LVTTL Standard. For data input with different standards, adjust
the setup time delay by the values shown in
Characteristics Standard Adjustments, page
Global Clock and IFF, without DLL
IFF = Input Flip-Flop or Latch
Setup time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
Description
R
Full Delay
(1)
T
PSFD
Symbol
/T
IOB Input Switching
PHFD
8.
www.xilinx.com
1-800-255-7778
XCV1000E
XCV1600E
XCV2600E
XCV2000E
XCV3200E
XCV100E
XCV200E
XCV300E
XCV400E
XCV600E
XCV50E
Device
Virtex™-E 1.8 V Field Programmable Gate Arrays
1.8 / 0
1.8 / 0
1.9 / 0
2.0 / 0
2.0 / 0
2.1 / 0
2.3 / 0
2.5 / 0
2.5 / 0
2.7 / 0
2.8 / 0
Min
Speed Grade
1.8 / 0
1.8 / 0
1.9 / 0
2.0 / 0
2.0 / 0
2.1 / 0
2.3 / 0
2.5 / 0
2.5 / 0
2.7 / 0
2.8 / 0
-8
1.8 / 0
1.8 / 0
1.9 / 0
2.0 / 0
2.0 / 0
2.1 / 0
2.3 / 0
2.5 / 0
2.5 / 0
2.7 / 0
2.8 / 0
-7
(2, 3)
1.8 / 0
1.8 / 0
1.9 / 0
2.0 / 0
2.0 / 0
2.1 / 0
2.3 / 0
2.5 / 0
2.5 / 0
2.7 / 0
2.8 / 0
-6
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21

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