XC5VSX50T-2FFG1136I Xilinx Inc, XC5VSX50T-2FFG1136I Datasheet - Page 336

IC FPGA VIRTEX-5 50K 1136FBGA

XC5VSX50T-2FFG1136I

Manufacturer Part Number
XC5VSX50T-2FFG1136I
Description
IC FPGA VIRTEX-5 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr

Specifications of XC5VSX50T-2FFG1136I

Number Of Logic Elements/cells
52224
Number Of Labs/clbs
4080
Total Ram Bits
4866048
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VSX50T-2FFG1136I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VSX50T-2FFG1136I
Manufacturer:
XILINX
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Chapter 7: SelectIO Logic Resources
X-Ref Target - Figure 7-13
336
CLK
CLK
Q1
Q2
D1
D2
T1
T2
Figure 7-13: IODELAY and IOB in Output Mode when 3-state is Enabled
ODDR
ODDR
IDDR
The second case uses bidirectional IODELAY when the I/O is an input switching to an
output.
by the 3-state TSCONTROL signal coming from the ODDR T flip-flop. This controls the
selection of MUXes E and F for the output path and ODELAY_VALUE respectively.
Additionally, the OBUF changes to not being 3-stated and starts to drive the PAD.
Figure 7-13
DATAOUT
ODATAIN
IODELAY
shows the IOB and IODELAY moving toward the output mode as set
Delay
Chain
www.xilinx.com
TSCONTROL
MUX E
MUX F
T
ODELAY_VALUE
IDELAY_VALUE
ODATAIN
IDATAIN
OBUF
IBUF
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
IOB
IODELAY_04_082107
PAD

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