CY7C66013C-PVXC Cypress Semiconductor Corp, CY7C66013C-PVXC Datasheet - Page 46

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CY7C66013C-PVXC

Manufacturer Part Number
CY7C66013C-PVXC
Description
IC MCU 8K USB HUB 4 PORT 48-SSOP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C66013C-PVXC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB, HAPI
Number Of I /o
29
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Controller Family/series
(8051) USB
No. Of I/o's
29
Ram Memory Size
256Byte
Cpu Speed
48MHz
Digital Ic Case Style
SSOP
Supply Voltage Range
4V To 5.5V
Core Size
8 Bit
Program Memory Size
8KB
Embedded Interface Type
HAPI, I2C, USB
Rohs Compliant
Yes
Processor Series
CY7C66xx
Core
M8
Data Bus Width
16 bit
Data Ram Size
256 B
Interface Type
HAPI, I2C, USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
29
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3654, CY3654-P03
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / Rohs Status
 Details
Other names
428-2261-5
CY7C66013C-PVXC
Table 17. Details of Modes for Differing Traffic Conditions (see
Document Number: 38-08024 Rev. *D
Nak In/premature status Out
1
1
1
1
1
1
Status Out/extra In
0
0
0
0
0
0
Normal Out/erroneous In
1
1
1
1
1
NAK Out/erroneous In
1
1
1
1
Isochronous endpoint (Out)
0
0
Normal In/erroneous Out
1
1
1
NAK In/erroneous Out
1
Mode Bits
Mode Bits
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1 0
1 0
1 0
1 0
1 0
1 0
1 0
1 0
1 0
1 0
1 0
1 0
0 1
0 1
0 1
0 1
0 1
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
0 1
0 0
Properties of Incoming Packet
Properties of Incoming Packet
Out
Out
Out
Out
Out
In
Out
Out
Out
Out
Out
In
Out
Out
Out
In
In
Out
Out
Out
In
Out
In
Out
Out
In
Out
token count buffer
token count buffer
2
2
!=2
> 10
x
x
2
2
!=2
> 10
x
x
<= 10 data
> 10
x
x
x
<= 10 UC
> 10
x
x
x
x
x
x
x
x
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
junk
junk
UC
UC
UC
UC
UC
updates updates updates updates updates UC
UC
UC
UC
UC
UC
x
invalid
x
x
x
valid
x
x
x
valid
valid
valid
x
invalid
valid
valid
valid
x
valid
x
invalid
x
invalid
x
x
x
dval
dval
1
0
updates 1
UC
UC
UC
1
0
updates 1
UC
UC
UC
updates 1
updates updates updates UC
updates 0
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
DTOG
DTOG
OUT ENDPOINT
1
1
UC
UC
UC
1
1
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
IN ENDPOINT
Changes made by SIE to Internal Registers and Mode Bits
DVAL COUNT Setup
Changes made by SIE to Internal Registers and Mode Bits
DVAL COUNT Setup
updates UC
updates UC
updates UC
UC
UC
UC
updates UC
updates UC
updates UC
UC
UC
UC
updates UC
updates UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
Table 16
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
for the decode legend) (continued)
UC 1
UC 1
UC 1
UC UC
UC UC
1
UC 1
UC 1
UC 1
UC UC
1
1
UC 1
UC 1
UC 1
UC UC
UC UC
UC 1
UC UC
UC UC
UC UC
UC 1
UC UC
UC UC
UC UC
1
UC UC
In
In
CY7C66013C, CY7C66113C
UC
UC
UC
UC
Out ACK Mode Bits Response
Out ACK Mode Bits Response
1
UC
UC
UC
UC
UC
1
UC
UC
UC
UC
UC
1
UC
UC
UC
UC
UC
UC
UC
UC
1
UC
UC
UC
1
UC
No Change ACK
0 0 1 1 Stall
0 0 1 1 Stall
No Change ignore
No Change ignore
No Change NAK
No Change ACK
0 0 1 1 Stall
0 0 1 1 Stall
No Change ignore
No Change ignore
0 0 1 1 Stall
1 0 0 0 ACK
No Change ignore
No Change ignore
No Change ignore
No Change Stall
No Change NAK
No Change ignore
No Change ignore
No Change ignore
No Change RX
No Change ignore
No Change ignore
No Change stall
1 1 0 0 ACK (back) yes
No Change ignore
(STALL
0)
(STALL
1)
(STALL
0)
(STALL
1)
Page 46 of 59
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Intr
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