ATF20V8B-7PC Atmel, ATF20V8B-7PC Datasheet - Page 7

IC PLD 7NS 24DIP

ATF20V8B-7PC

Manufacturer Part Number
ATF20V8B-7PC
Description
IC PLD 7NS 24DIP
Manufacturer
Atmel
Datasheet

Specifications of ATF20V8B-7PC

Programmable Type
EE PLD
Number Of Macrocells
8
Voltage - Input
5V
Speed
7ns
Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATF20V8B7PC

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Compiler Mode Selection
Note:
ATF20V8B Registered Mode
PAL Device Emulation/PAL Replacement. The registered
mode is used if one or more registers are required. Each
macrocell can be configured as either a registered or com-
binatorial output or I/O, or as an input. For a registered out-
put or I/O, the output is enabled by the OE pin, and the
register is clocked by the CLK pin. Eight product terms are
allocated to the sum term. For a combinatorial output or
I/O, the output enable is controlled by a product term, and
seven product terms are allocated to the sum term. When
Registered Mode Operation
ABEL, Atmel-ABEL
CUPL
LOG/iC
OrCAD-PLD
PLDesigner
Tango-PLD
1. Only applicable for version 3.4 or lower.
Registered
P20V8R
G20V8MS
GAL20V8_R
“Registered”
P20V8
G20V8
(1)
Complex
P20V8C
G20V8MA
GAL20V8_C7
“Complex”
P20V8
G20V8
the macrocell is configured as an input, the output enable is
permanently disabled.
Any register usage will make the compiler select this mode.
The following registered devices can be emulated using
this mode:
20R8
20R6
20R4
(1)
20RP8
20RP6
20RP4
Simple
P20V8
G20V8
GAL20V8_C8
“Simple”
P20V8
G20V8
(1)
Auto Select
P20V8
G20V8A
GAL20V8
GAL20V8
P20V8
G20V8
7

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