ADAU1361BCPZ Analog Devices Inc, ADAU1361BCPZ Datasheet - Page 49

IC CODEC 24B PLL 32LFCSP

ADAU1361BCPZ

Manufacturer Part Number
ADAU1361BCPZ
Description
IC CODEC 24B PLL 32LFCSP
Manufacturer
Analog Devices Inc
Type
Audio Codecr
Datasheet

Specifications of ADAU1361BCPZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
Voltage - Supply, Analog
1.8 V ~ 3.6 V
Voltage - Supply, Digital
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, CSP Exposed Pad
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
6
No. Of Output Channels
7
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
101dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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R4: Record Mixer Left (Mixer 1) Control 0, 16,394 (0x400A)
This register controls the gain of single-ended inputs for the left channel record path. The left channel record mixer is referred to as Mixer 1.
Bit 7
Reserved
Table 31. Record Mixer Left (Mixer 1) Control 0 Register
Bits
[6:4]
[3:1]
0
Bit Name
LINPG[2:0]
LINNG[2:0]
MX1EN
Bit 6
Gain for a left channel single-ended input from the LINP pin, input to Mixer 1.
Gain for a left channel single-ended input from the LINN pin, input to Mixer 1.
Left channel mixer enable in the record path. Referred to as Mixer 1.
Description
Setting
000
001
010
011
100
101
110
111
Setting
000
001
010
011
100
101
110
111
0 = mixer disabled (default).
1 = mixer enabled.
Bit 5
LINPG[2:0]
Bit 4
Gain
Mute (default)
−12 dB
−9 dB
−6 dB
−3 dB
0 dB
3 dB
6 dB
Gain
Mute (default)
−12 dB
−9 dB
−6 dB
−3 dB
0 dB
3 dB
6 dB
Rev. C | Page 49 of 80
Bit 3
Bit 2
LINNG[2:0]
Bit 1
ADAU1361
Bit 0
MX1EN

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