W681512SG TR Nuvoton Technology Corporation of America, W681512SG TR Datasheet
W681512SG TR
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W681512SG T&R
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W681512SG TR Summary of contents
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W681512 SINGLE-CHANNEL VOICEBAND CODEC Data Sheet Publication Release Date: September, 2007 - 1 - Revision C14 ...
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GENERAL DESCRIPTION is a general-purpose single channel PCM CODEC with pin-selectable μ-Law or A-Law W681512 The companding. The device is compliant with the ITU G.712 specification. It operates from a single +5V power supply and is available in 20-pin ...
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BLOCK DIAGRAM BCLKR BCLKR FSR PCMR BCLKT BCLKT BCLKT FST PCMT Pre - Scaler Pre - scaler MCLK MCLK 256 kHz, 256 kHz, 512 kHz, 512 kHz, 1536 kHz, 1536 kHz, 1544 kHz, 1544 kHz, 2048 kHz, 2048 kHz, ...
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TABLE OF CONTENTS 1. GENERAL DESCRIPTION.................................................................................................................. 2 2. FEATURES ......................................................................................................................................... 2 3. BLOCK DIAGRAM .............................................................................................................................. 3 4. TABLE OF CONTENTS ...................................................................................................................... 4 5. PIN CONFIGURATION ....................................................................................................................... 6 6. PIN DESCRIPTION ............................................................................................................................. 7 7. FUNCTIONAL DESCRIPTION............................................................................................................ 8 7.1. Transmit Path ...
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SSOP-209 mil ..................................................................................................................... 33 12.3. 20L TSSOP - 4.4X6.5mm .......................................................................................................... 35 13. ORDERING INFORMATION........................................................................................................... 36 14. VERSION HISTORY ....................................................................................................................... 37 Publication Release Date: April, 2007 - 5 - W681512 Revision C14 ...
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PIN CONFIGURATION RO+ RO- PAI PAO- PAO FSR FSR PCMR BCLKR BCLKR PUI SINGLE SINGLE ...
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PIN DESCRIPTION Pin Pin Functionality Name No. RO+ 1 Non-inverting output of the receive smoothing filter. This pin can typically drive a 2 kΩ load to 1.575 volt peak referenced to the analog ground level. RO- 2 Inverting output ...
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FUNCTIONAL DESCRIPTION W681512 is a single-rail, single channel PCM CODEC for voiceband applications. The CODEC complies with the specifications of the ITU-T G.712 recommendation. The CODEC also includes a complete μ-Law and A-Law compander. The μ-Law and A-Law companders ...
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AI+ is tied to V Table 7.1 When the input amplifier is powered down, the input signal AI- needs to be referenced to ...
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If the transmit power amplifier is not in use, it can be powered down by connecting PAI 7. OWER ANAGEMENT 7.3.1. Analog and Digital Supply The power supply ...
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PCMT will become low impedance when the Frame Sync signal FST is HIGH or when the 8 bit data word is being transmitted. The transmit data pin PCMT will become high impedance when the Frame Sync signal FST becomes LOW ...
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Interchip Digital Link (IDL) The IDL interface mode is selected when the BCLKR pin is connected to V sync cycles. It can be used as a 2B+D timing interface in an ISDN application. The IDL interface consists of 4 ...
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TIMING DIAGRAMS T T FTRHM FTRSM MCLK FST T T FTRH FTRS BCLKT FDTD PCMT D7 D6 MSB FSR T T FRRH FRRS BCLKR PCMR D7 D6 MSB T DRS T T ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS T FST / FSR Minimum LOW Width FSL 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR HIGH Pulse Width BCKH T BCLKT, BCLKR LOW Pulse Width BCKL T BCLKT 0 Falling Edge to ...
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FTRHM FTRSM MCKH MCLK T FTFH T FTFS FST T T FTRS FTRH BCLKT - BDTD PCMT D7 D6 MSB T FRFH T FRFS FSR T T FRRS FRRH BCLKR - ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR HIGH Pulse Width BCKH T BCLKT, BCLKR LOW Pulse Width BCKL T BCLKT –1 Falling Edge to FST Rising Edge Hold FTRH Time T FST ...
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FST T FSFH T T FSRH FSRS BCLKT - BDTD PCMT MSB T T DRS PCMR MSB BCH ...
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FST T FSFH T T FSRH FSRS BCLKT ...
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SYMBOL DESCRIPTION 1/T Master Clock Frequency MCK T / MCLK Duty Cycle for 256 kHz MCKH T Operation MCK T Minimum Pulse Width HIGH for MCKH MCLK(512 kHz or Higher) T Minimum Pulse Width LOW for MCLK MCKL (512 kHz ...
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ABSOLUTE MAXIMUM RATINGS 9. BSOLUTE AXIMUM Condition Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA Stresses above those ...
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ELECTRICAL CHARACTERISTICS 10. ENERAL ARAMETERS Symbol Parameters V Input LOW Voltage IL V Input HIGH Voltage IH V PCMT Output LOW Voltage OL V PCMT Output HIGH Voltage OH V Current (Operating) - ADC + DAC I ...
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NALOG IGNAL EVEL AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred MCLK=BCLK= 2.048MHz; FST=FSR=8kHz synchronous operation PARAMETER SYM. Absolute L 0 dBm0 = 0dBm @ ...
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A D NALOG ISTORTION AND =5V ±10 =0V MCLK=BCLK= 2.048MHz; FST=FSR=8kHz synchronous operation PARAMETER SYM. Total Distortion vs. D LTμ Level Tone (1020 Hz, μ-Law, C-Message Weighted) Total Distortion vs. D LTA Level Tone ...
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A I NALOG NPUT AND =5V ±10 =0V PARAMETER AI Input Offset Voltage AI Input Current AI Input Resistance AI Input Capacitance AI Common Mode Input Voltage Range AI Common Mode Rejection Ratio AI ...
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PARAMETER PO Differential Gain PO Differential Signal to Distortion C-Message weighted PO Power Supply Rejection Ratio ( kHz Differential DD out) SYM. CONDITION G R =300Ω, +3dBm0, 1 kHz PAO+ to PAO- D ...
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D I/O IGITAL 10.5.1. μ-Law Encode Decode Characteristics Normalized Encode Decision D7 D6 Levels Sign Chord 8159 1 0 7903 : 4319 1 0 4063 : 2143 1 0 2015 : 1055 1 0 991 : 511 1 0 ...
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A-Law Encode Decode Characteristics Normalized Encode D7 D6 Decision Sign Chord Levels 4096 1 0 3968 : 2048 1 0 2048 : 1088 1 0 1024 : 544 1 0 512 : 272 1 0 256 : 136 1 ...
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PCM Codes for Zero and Full Scale Level Sign bit Chord bits (D7) (D6,D5,D4) + Full Scale 1 + Zero 1 - Zero 0 - Full Scale 0 10.5.4. PCM Codes for 0dBm0 Output Sample Sign bit Chord bits ...
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TYPICAL APPLICATION CIRCUIT 1 DIFFERENTIAL AUDIO IN + 1 DIFFERENTIAL AUDIO OUT RL > 2K ohms + Figure 11.1 Typical circuit for Differential Analog I/O’s 1.0 uF AUDIO IN 1.0 uF 0.01 uF ...
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ELECTRET MICROPHONE 62K 0.01 uF 27K 1.5K SPEAKER 27K 1.0 uF 600 0.01 uF TRANSFORMER 600 OHM 1:1 Figure 11.4 Transformer Interface Circuit in GCI mode VDD 1K U4 62K ...
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PACKAGE SPECIFICATION 12.1. 20L SOG (SOP)-300 SMALL OUTLINE PACKAGE (SAME AS SOG & SOIC) DIMENSIONS SEATING PLANE MIL W681512 0.25 ...
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DIMENSION (MM) SYMBOL MIN. MAX. A 2.35 2.65 A1 0.10 0.30 b 0.33 0.51 c 0.23 0.32 E 7.40 7.60 D 12.60 13.00 e 1.27 BSC H 10.00 10. 0.10 L 0.40 1.27 0 0º 8º - ...
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SSOP-209 MIL SHRINK SMALL OUTLINE PACKAGE DIMENSIONS SEATING PLANE Publication Release Date: September, 2005 - 33 - W681512 DTEAIL SEATING PLANE θ ...
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DIMENSION (MM) SYMBOL MIN. NOM 0. 1.65 1. 6.90 7.20 E 5.00 5.30 H 7.40 7. 0.65 L 0.55 0. 1.25 Y ...
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TSSOP - 4.4X6.5 MM PLASTIC THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) DIMENSIONS DIMENSION (MM) SYMBOL MIN 0.05 A2 0. 6. 0.09 0 0º Y ...
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ORDERING INFORMATION W681512_ _ Product Family W681512 Product When ordering W681512 series devices, please refer to the following part numbers. *All Pb packages will be available for a limited time. Thus, Pb-free packages are strongly recommended. Winbond Part Number ...
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VERSION HISTORY VERSION DATE PAGE A10 March 25, 2003 A11 April 2, 2003 B11 July, 2004 C11 November, 2004 C12 April 2005 C13 September 29 2005 Various 2, 22 C14 April, 2007 Winbond products are not designed, ...
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Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or ...