EMC2102-DZK-TR SMSC, EMC2102-DZK-TR Datasheet
EMC2102-DZK-TR
Specifications of EMC2102-DZK-TR
Related parts for EMC2102-DZK-TR
EMC2102-DZK-TR Summary of contents
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... SHDN_SEL pin on the PCB. The HW thermal shutdown point can be set in 1°C increments by using a discrete resistor divider implemented on the TRIP_SET pin. The EMC2102 also provides 5V supply ‘power good’ function with a threshold of 4.5V. This function is provided on the RESET# pin. SMSC EMC2102 ...
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... EMC2102-DZK FOR 28-PIN QFN LEAD-FREE ROHS COMPLIANT PACKAGE (ADDRESS - 011_1101) 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given ...
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... RPM-Based Fan Controller with HW Thermal Shutdown Datasheet Table of Contents Chapter 1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 2 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Pin Layout for EMC2102 2.2 Pin Description for EMC2102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chapter 3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3 SMBus Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Chapter 4 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 ...
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... TACH Target Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.19 TACH Reading Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.20 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.21 Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Chapter 7 Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Appendix A TACH Reading Table - 2000 RPM Range Appendix B TACH Reading Table - 500RPM Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Revision 2.02 (05-17-07) RPM-Based Fan Controller with HW Thermal Shutdown 4 DATASHEET Datasheet SMSC EMC2102 ...
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... Figure 5.1 EMC2102 System Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 5.2 RPM based Fan Control Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 5.3 Spin Up Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 5.4 EMC2102 Critical/Thermal Shutdown Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 5.5 HW_SHDN Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 5.6 5V Reset Controller Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 7.1 EMC2102 28-Pin 5x5mm QFN Package Outline and Parameters . . . . . . . . . . . . . . . . . . . . 47 ...
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... Table 5.1 Fan Controls Active for Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 5.2 FAN_MODE Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 5.3 CLK_SEL Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 5.4 SHDN_SEL Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6.1 EMC2102 Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 6.2 Temperature data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.3 Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.4 Critical/Thermal Shutdown Temperature Register Table 6 ...
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... Ext. Temp Registers ADC Voltage Reading Bandgap Reference Voltage -> Temperature Converison Automatic Fan Control Algorithms TACH Monitor Figure 1.1 EMC2102 Block Diagram 7 DATASHEET SMCLK SMBus Slave SMDATA Protocol ALERT# POWER_OK Register Set and Logic FAN_MODE Revision 2.02 (05-17-07) ...
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... Chapter 2 Pinout 2.1 Pin Layout for EMC2102 1 VDD_3V 2 DN1 DP1 3 DN2 4 DP2 5 DN3 6 DP3 7 Revision 2.02 (05-17-07) RPM-Based Fan Controller with HW Thermal Shutdown EMC2102 QFN Figure 2.1 EMC2102 Pin Diagram 8 DATASHEET Datasheet 21 N/C 20 GND ALERT# 19 CLK_IN 18 CLK_SEL 17 16 RESET# 15 N/C SMSC EMC2102 ...
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... RPM-Based Fan Controller with HW Thermal Shutdown Datasheet 2.2 Pin Description for EMC2102 PIN NAME 1 VDD_3V DN1 2 DP1 3 DN2 4 DP2 5 DN3 6 DP3 7 8 N/C SHDN_SEL 9 FAN_MODE 10 TRIP_SET 11 SYS_SHDN# 12 THERMTRIP POWER_OK 15 N/C 16 RESET# CLK_SEL 17 18 CLK_IN 19 ALERT# 20 GND 21 N/C SMDATA 22 SMCLK 23 SMSC EMC2102 Table 2 ...
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... Linear fan drive signal. Both FAN pins should be connected together. 5V supply input for the linear fan driver. Both VDD_5V pins should be connected to same 5V supply. Input from the tachometer pin of the fan. 10 DATASHEET Datasheet TYPE Power AO AO Power DI (5V) SMSC EMC2102 ...
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... V DD_3V 5V Supply Voltage V DD_5V Supply Current from I DD3 VDD_3V pin Supply Current from I DD5 VDD_5V pin SMSC EMC2102 Table 3.1 Absolute Maximum Ratings Table 2.1, "Pin -0.3 to 6.5 -0 -0.3 to VDD_5V + 0.3 -0.3 to VDD_3V + 0.3 0 125 -55 to 150 2000 ) is dependent on the design of the thermal vias. Without thermal JA is approximately 60° ...
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... Connected across CPU or GPU thermal diode (Note 3.5) Series resistance in DP and DN lines (Note 3 rising edge DD_5V 3V < V < 3.6V DD_3V I = 600mA, VDD_5V = SOURCE 5V Momentary Current drive at startup for < 2 seconds Sourcing current, Thermal shutdown not triggered, FAN_OUT = 0V SMSC EMC2102 ...
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... Input Low Voltage V IL Input High/Low Current Input Capacitance C IN Output Low Sink Current Clock Frequency f SMB Spike Suppression t SP SMSC EMC2102 = 27°C unless otherwise noted. A MIN TYP MAX UNIT 480 16000 RPM ±1 ±2 ±5 ±7.5 Thermal Shutdown 150 50 SMBus and Digital I/O pins VDD _3V 0 ...
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... Revision 2.02 (05-17-07) RPM-Based Fan Controller with HW Thermal Shutdown = 0°C to 85° 27°C unless otherwise noted. A MIN TYP MAX UNITS 1.3 us 0.6 us 0 1.3 us 0.6 us 300 ns Min = 20+0.1C 300 ns Min = 20+0.1C 400 pF per bus line 14 DATASHEET Datasheet CONDITIONS ns LOAD ns LOAD SMSC EMC2102 ...
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... RPM-Based Fan Controller with HW Thermal Shutdown Datasheet Chapter 4 System Management Bus Interface Protocol The EMC2102 communicates with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in however the EMC2102 will not stretch the clock signal ...
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... Table 4.4 Send Byte Protocol REGISTER WR ACK ADDRESS 1 1 Table 4.5. Table 4.5 Receive Byte Protocol RD ACK REGISTER DATA 1 1 Table 4.6. DEVICE RD ACK ADDRESS DATASHEET Datasheet Table 4.3. RD ACK Register NACK STOP Data Table 4.4. ACK STOP NACK STOP NACK STOP SMSC EMC2102 ...
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... RPM-Based Fan Controller with HW Thermal Shutdown Datasheet The EMC2102 will respond to the ARA command if the ALERT# pin has been asserted but will not immediately release the ALERT# pin. The ALERT# pin is released under the following conditions. 1. The Interrupt Status Registers are read and the error condition has been removed. ...
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... The EMC2102 integrates a closed-loop RPM based Fan Control Algorithm. A host writes the desired fan speed into a register of the EMC2102 via the SMBus and the integrated fan controller will maintain the fan at the desired speed using fan speed feedback from the TACH output from a 3-wire fan. The fan control algorithm controls an integrated 5V, 600mA, linear fan driver ...
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... VDD_3V VDD_5V EMC2102 SMCLK SMDATA ALERT# TACH FAN DP 1 DN1 DP 2 DN2 DP3 DN3 CLK_SEL CLK_IN FAN_MODE SHDN_SEL TRIP_SET SYS_SHDN# RESET# THERMTRIP# POWER_OK Figure 5.1 EMC2102 System Diagram 19 DATASHEET 5V 3.3V TACHOMETER FAN VCC 3.3V 32.768KHz Clock 3.3V RESET Revision 2.02 (05-17-07) ...
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... Resistance Error Correction The EMC2102 includes active Resistance Error Correction to remove the effect 100 ohms of series resistance. Without this automatic feature, voltage developed across the parasitic resistance in the remote diode path causes the temperature to read higher than the true temperature is. The error induced by parasitic resistance is approximately +0.7° ...
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... Datasheet 5.2 Fan Control Modes of Operation The EMC2102 has two modes of operation for the High Side Fan Driver. They are: 1. Manual Mode - in this mode of operation, the user directly controls the fan drive setting. Updating the Fan Driver Setting Register (see The Manual Mode is enabled by clearing the EN bit in the Fan Configuration Register (see Section 6 ...
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... The fan driver automatically detects and attempts to alleviate a stalled/stuck fan condition while also asserting the ALERT# pin. The EMC2102 works with fans that operate up to 16,000 RPMs and provide a valid tachometer signal. The fan controller will function either with an externally supplied 32.768KHz clock source or with it’ ...
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... The RPM based Fan Control Algorithm powers-up enabled and active. The following registers control the algorithm. The EMC2102 fan control registers are preloaded with defaults that will work for a wide variety of fans so only the TACH Target Register is required to set a fan speed. The other fan control registers can be used to fine-tune the algorithm behavior based on application requirements ...
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... For the remaining spin up time, the fan driver output is set a a user defined level (60% or 75% drive). After the Spin Up Routine has finished, the EMC2102 measures the TACH. If the measured TACH count is higher than the Valid TACH Count Register setting, the FAN_SPIN status bit is set and the Spin Up Routine will automatically attempt to restart the fan ...
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... Datasheet 5.3.4 FAN_MODE Pin The FAN_MODE pin is used to determine the fan driver output levels at power-up before the EMC2102 has been programmed. After power-up, the fan driver will be set at the selected drive until the RPM based Fan Control Algorithm is started or disabled. The level on the pin determines the function as shown in ...
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... High Side Fan Driver The EMC2102’s fan controller integrates a 5V, 600mA, linear high side fan driver to directly drive a 5V fan. By fully integrating the linear fan driver, the typical requirement for the discrete pass device and other external linearization circuitry is completely eliminated. The linear fan driver is driven by an 8-bit DAC providing better than 20mV resolution between steps ...
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... From the POWER_OK Power Supply ThermTrip# Power_OK ThermTrip_SHDN Figure 5.4 EMC2102 Critical/Thermal Shutdown Block Diagram SMSC EMC2102 Pin". Section 5.7.1, "TRIP_SET". Critical Shutdown Logic SYS1 - SYS3 Temperature SW_SHDN Conversion and Limit Registers ‘0’ or ‘open’ PIN Decode Temperature Conversion ‘1’ ...
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... The EMC2102 has one ‘strappable’ input (SHDN_SEL) allowing for configuration of the hardware Critical/Thermal Shutdown. This pin has 3 possible states and is monitored and decoded by the EMC2102 at power-up. The three possible states are 0 (tied to GND), 1 (tied to 3.3V) or High-Z (open). The states of this pin determine which remote temperature channel and configuration is used by the Critical/Thermal Shutdown function ...
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... TRIP_SET input pin (as shown in Figure 5.5, "HW_SHDN Operation") P for a number of consecutive measurements defined by the fault queue. If the HW_SHDN output is asserted and the temperature drops below T TP Temperature not defined HW_SHDN SMSC EMC2102 , then it will be set to a logic ‘0’ state. P Temperature Measurements End Exceeds TP th After 4 HW_SHDN set Figure 5 ...
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... Reset Controller The EMC2102 also provides a ‘power-good’ reset controller for the system’s 5V supply rail. The reset controller will set the RESET# pin to a logic ‘0’ after power-up and set the RESET# pin to a logic ‘1’ 220ms after the VDD_5V supply rises above its threshold voltage (see Specifications" ...
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... External Diode 2 Beta Configuration 32h R/W External Diode REC Configuration SMSC EMC2102 Table 6.1 EMC2102 Register Set FUNCTION Temperature Registers Stores the integer data of the Internal Temp Reading Stores the integer data of External Diode 1 Stores the integer data of External Diode 2 Stores the integer data of External ...
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... Table 6.1 EMC2102 Register Set (continued) REGISTER ADDR R/W NAME 41h R/W External Diode 1 Temp High Limit 42h R/W External Diode 2 Temp High Limit 43h R/W External Diode 3 Temp High Limit 51h R/W Fan Driver Setting 52h R/W Fan Configuration 53h ...
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... If the High Side Fan Driver is active, then self-heating of the large current drive device will affect the internal temperature reading. Therefore not recommended that the Internal temperature channel be used to monitor the ambient air temperature. SMSC EMC2102 Table 6.2 Temperature data Registers B6 B5 ...
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... Configuration QUEUE[1:0] The Configuration Register controls the basic functionality of the EMC2102. The bits are described below. The Configuration Register is software locked. Bit 7-6 - QUEUE[1:0] - determines how many consecutive out-of-limit errors must occur on the hardware selected and software enabled temperature channels before the SYS_SHDN# pin is asserted (see Table 5.2, " ...
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... Bit CONV[1:0] - determines the conversion rate of the temperature monitoring. This conversion rate does not affect the fan driver. The supply current from VDD_3V is nominally dependent upon the conversion rate and the average current will increase as the conversion rate increases. SMSC EMC2102 Section 5.7, "Critical/Thermal Section 5 ...
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... Status Register 1 The Interrupt Status Registers report the operating condition of the EMC2102. If any of the bits are set to a logic ‘1’ (other than the RESET pin) then the ALERT# pin will be asserted low. Reading from the status register clears all status bits if the error conditions is removed. If there are no set status bits, then the ALERT# pin will be released ...
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... Status Register 2 The Interrupt Status Registers report the operating condition of the EMC2102. If any of the bits (except the PWROK, THERM, and HWS bits) are asserted then the ALERT# pin will be asserted low. Reading from the status register clears all status bits if the error conditions is removed. If there are no set status bits, then the ALERT# pin will be released. Bit 7 - PWROK - this bit is set if the POWER_OK pin is set to a logic ‘ ...
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... CPU’s. For 90nm CPU’s the optimal beta setting is 04h. Revision 2.02 (05-17-07) RPM-Based Fan Controller with HW Thermal Shutdown Table 6.12 Beta Configuration Registers Configuration"), the External Diode 1 Beta Configuration 38 DATASHEET Datasheet DEFAULT BETA1[2:0] 03h BETA2[2:0] 03h SMSC EMC2102 ...
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... REC functionality for External Diode 2 is enabled. Bit 0 - REC1 - Controls the Resistive Error Correction functionality of External Diode 1 ‘0’ - the REC functionality for External Diode 1 is disabled ‘1’ (default) - the REC functionality for External Diode 1 is enabled. SMSC EMC2102 ...
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... External Diode Sign 3 High Limit The EMC2102 contains high limits for all temperature channels.If any particular temperature channel exceeds the high limit then the appropriate status bit is set. Each temperature channel software limit can be individually enabled to assert the SYS_SHDN# pin if the temperature exceeds this limit. ...
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... Bit 2-0 - UPDATE - determines the base time between fan driver updates. The Update Time, along with the Fan Step Register, is used to control the ramp rate of the drive response to provide a cleaner transition of the actual fan operation as the desired fan speed changes. The Update Time is set as shown in Table 6.19, "Update SMSC EMC2102 ...
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... LEVEL Routine"). If a valid TACH is not detected before the Spin Time has Table 6.21, "Spin Time". Table 6.21 Spin Time 0 TOTAL SPIN UP TIME DATASHEET Datasheet 100ms 200ms 300ms 500ms 800ms 1200ms 1600ms DEFAULT SPINUP_TIM 01h E [1:0] 250 ms 500 ms (default) SMSC EMC2102 ...
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... Control Algorithm will attempt to restart the fan. Setting the Fan Minimum Drive Registers to a setting that will maintain fan operation is a useful way to avoid potential fan oscillations as the control circuitry attempts to drive level that cannot support fan operation. The Fan Minimum Drive Register is software locked. SMSC EMC2102 Table 6.21 Spin Time (continued Table 6 ...
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... Equation [4] Table 6.25 TACH Reading Registers 2048 1024 512 256 128 Table 6.26 TACH Reading Register 2048 1024 512 256 128 44 DATASHEET Datasheet DEFAULT F5h for translating the count to an RPM DEFAULT FAh DEFAULT FFh Equation SMSC EMC2102 ...
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... Product ID Register ADDRESS REGISTER B7 FDh Product ID 0 Register (EMC2102-1) The Product ID Register contains a unique 8 bit word that identifies the product. SMSC EMC2102 poles = number of poles of the fan period = period of oscillation (30.5175us the period for a 32.768khz clock) × × × × ----------------- - ...
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... Revision Register ADDRESS REGISTER B7 FFh Revision 0 The Revision Register contains a 8 bit word that identifies the die revision. Revision 2.02 (05-17-07) RPM-Based Fan Controller with HW Thermal Shutdown Table 6.29 Revision Register DATASHEET Datasheet DEFAULT 0 0 00h SMSC EMC2102 ...
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... RPM-Based Fan Controller with HW Thermal Shutdown Datasheet Chapter 7 Package Drawing Figure 7.1 EMC2102 28-Pin 5x5mm QFN Package Outline and Parameters SMSC EMC2102 47 DATASHEET Revision 2.02 (05-17-07) ...
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... SMSC EMC2102 Table 7.1 TACH Count to RPM (2k Range) (continued) REGISTER READING DEC HEX RPM 480 1Eh 16384 496 1Fh 15855 512 20h 15360 528 ...
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... AAh 2891 2736 ABh 2874 2752 ACh 2858 2768 ADh 2841 2784 AEh 2825 2800 AFh 2809 2816 B0h 2793 2832 B1h 2777 2848 B2h 2761 2864 B3h 2746 2880 B4h 2731 2896 B5h 2716 2912 B6h 2701 SMSC EMC2102 ...
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... D0h 2363 3344 D1h 2352 3360 D2h 2341 3376 D3h 2329 3392 D4h 2318 3408 D5h 2308 SMSC EMC2102 Table 7.1 TACH Count to RPM (2k Range) (continued) REGISTER READING DEC HEX RPM 3424 D6h 2297 3440 D7h 2286 3456 D8h 2276 3472 ...
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... SMSC EMC2102 ...
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... SMSC EMC2102 Table 7.2 TACH Count to RPM (500 Range) (continued) REGISTER READING DEC HEX RPM 1888 76h 1041 1904 77h 1033 1920 78h 1024 1936 ...
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... F3h 506 3904 F4h 504 3920 F5h 502 3936 F6h 500 3952 F7h 497 3968 F8h 495 3984 F9h 493 4000 FAh 492 4016 FBh 490 4032 FCh 488 4048 FDh 486 4064 FEh 484 4080 FFh 482 SMSC EMC2102 ...