LAN9210-ABZJ SMSC, LAN9210-ABZJ Datasheet - Page 28

IC ETHERNET CTLR SGL CHIP 56-QFN

LAN9210-ABZJ

Manufacturer Part Number
LAN9210-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Datasheet

Specifications of LAN9210-ABZJ

Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1048-6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9210-ABZJ
Manufacturer:
Standard
Quantity:
2 500
Revision 2.7 (03-15-10)
3.6
3.6.1
Destination Address Source Address ……………FF FF FF FF FF FF
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
…CRC
It should be noted that Magic Packet detection can be performed when LAN9210 is in the D0 or D1
power states. In the D0 state, “Magic Packet” detection is enabled when the MPEN bit is set. In the
D1 state, Magic Packet detection, as well as wake-up frame detection, are automatically enabled when
the device enters the D1 state.
The LAN9210 contains two checksum offload engines, which offload the calculation of the 16-bit
checksum for transmitted and received Ethernet frames. The functionality of the checksum offload
engines is described in the following sections:
Receive Checksum Offload Engine (RXCOE)
The receive checksum offload engine provides assistance to the CPU by calculating a 16-bit checksum
for a received Ethernet frame. The RXCOE readily supports the following IEEE802.3 frame formats:
The resulting checksum value can also be modified by software to support other frame formats.
The RXCOE has two modes of operation. In mode 0, the RXCOE calculates the checksum between
the first 14 bytes of the Ethernet frame and the FCS. This is illustrated in
Checksum Offload Engines (COE)
Receive Checksum Offload Engine (RXCOE)
Transmit Checksum Offload Engine (TXCOE)
Type II Ethernet frames
SNAP encapsulated frames
Support for up to 2, 802.1q VLAN tags
DST
SRC
T
Y
P
E
Figure 3.4 RXCOE Checksum Calculation
DATASHEET
Calculate Checksum
28
Frame Data
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Figure
F
C
S
3.4.
SMSC LAN9210
Datasheet

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