MAX3421EETJ+T Maxim Integrated Products, MAX3421EETJ+T Datasheet - Page 14

IC USB PERIPH/HOST CNTRL 32TQFN

MAX3421EETJ+T

Manufacturer Part Number
MAX3421EETJ+T
Description
IC USB PERIPH/HOST CNTRL 32TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX3421EETJ+T

Controller Type
USB Peripheral Controller
Interface
USB/Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
15mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
For Use With
MAX3421EVKIT-1+ - EVAL KIT FOR MAX3421E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
USB Peripheral/Host Controller
with SPI Interface
14
Figure 8. Rise and Fall Times
Figure
Figure
V
V
OH
OL
______________________________________________________________________________________
10. SPI Bus Timing Diagram (Full-Duplex Mode, SPI Mode (0,0))
11. SPI Bus Timing Diagram (Half-Duplex Mode, SPI Mode (0,0))
SCLK
MOSI
MISO
SS
SCLK
MOSI
NOTES:
1) DURING THE FIRST 8 CLOCKS CYCLES, THE MOSI PIN IS HIGH IMPEDANCE AND THE SPI MASTER DRIVES DATA ONTO THE MOSI PIN. SETUP AND HOLD TIMES ARE THE SAME AS
2) FOR SPI WRITE CYCLES, THE MOSI PIN CONTINUES TO BE HIGH IMPEDANCE AND THE EXTERNAL MASTER CONTINUES TO DRIVE MOSI.
3) FOR SPI READ CYCLES, AFTER THE 8TH CLOCK-FALLING EDGE, THE MAX3421E STARTS DRIVING THE MOSI PIN AFTER TIME t
MISO
FOR FULL-DUPLEX MODE.
OFF ITS DRIVER TO THE MOSI PIN BEFORE t
SS
t
RISE
HIGH
IMPEDANCE
HIGH
IMPEDANCE
t
CSS
t
L
t
L
1
1
t
ON
DS
TO AVOID CONTENTION. PROPAGATION DELAYS ARE THE SAME AS FOR THE MOSI PIN IN FULL-DUPLEX MODE.
t
DS
t
t
DH
FALL
2
t
DH
2
10%
90%
8
8
t
ON
Test Circuits and Timing Diagrams
Figure 9. Load for D+/D- AC Measurements
9
9
t
DO
MAX3421E
t
t
CL
DI
t
CL
t
CP
t
CP
t
10
CH
D+ OR D-
t
10
CH
ON
. THE EXTERNAL MASTER MUST TURN
33Ω
16
16
t
T
t
T
HIGH
IMPEDANCE
t
OFF
HIGH
IMPEDANCE
t
t
CSW
CSW
C
POINT
L
TEST
HI-Z
15kΩ

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