UPD720101GJ-UEN-A Renesas Electronics America, UPD720101GJ-UEN-A Datasheet - Page 11

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UPD720101GJ-UEN-A

Manufacturer Part Number
UPD720101GJ-UEN-A
Description
HOST CTLR USB 2.0 144-LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD720101GJ-UEN-A

Controller Type
USB Peripheral Controller
Interface
PCI
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Compliant
Other names
972-1001

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Remarks 1. “5 V tolerant“ means that the buffer is 3 V buffer with 5 V tolerant circuit.
SMC
TEB
AMC
TEST
NANDTEST
AV
V
V
AV
V
N.C.
DD
DD_PCI
SS
DD
SS
Pin Name
2. “5 V PCI” indicates a PCI buffer, which complies with the 3 V PCI standard, has a 5 V tolerant circuit. It
3. The signal marked as “(I/O)” in the above table operates as I/O signals during testing. However, they
does not indicate that this buffer fully complies with 5 V PCI standard. However, this function can be
used for evaluating the operation of a device on a 5 V add-in card.
do not need to be considered in normal use.
I/O
I
I
I
I
I
Input with 50 kΩ pull down R
Input with 50 kΩ pull down R
Input with 50 kΩ pull down R
Input with 50 kΩ pull down R
Input with 50 kΩ pull down R
Buffer Type
Data Sheet S16265EJ5V0DS
High
High
High
High
High
Active
Level
Scan mode control
BIST enable
ATG mode control
Test control
NAND tree test enable
V
V
5 V (5 V PCI) or 3.3 V (3.3 V PCI)
V
V
No connection
DD
DD
SS
SS
for analog circuit
for analog circuit
Function
µ
PD720101
(2/2)
9

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