TMC2072-MT SMSC, TMC2072-MT Datasheet - Page 71

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TMC2072-MT

Manufacturer Part Number
TMC2072-MT
Description
IC CTRLR CIRC 100-TQFP DUAL MODE
Manufacturer
SMSC
Series
CircLink™r
Datasheet

Specifications of TMC2072-MT

Controller Type
I/O Controller
Interface
Transceiver
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1023

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMC2072-MT
Manufacturer:
Microchip Technology
Quantity:
10 000
Peripheral Mode CircLink™ Controller
Datasheet
3.2.8
SMSC TMC2072
(SUBAD1-0 be integration to the COMR5 register )
- When reading/writing: ARCNET configuration register
RESET (bit 7)
This bit sets a software reset. Setting 1 to this bit causes software reset and setting 0 releases it.
TXEN (bit 5)
This bit sets access to/leaving from the network (online and offline respectively); Setting 1 to this bit is on-
line and setting 0 off-line. A temporary software reset is applied when the bit is changed from 0 to 1. (The
software reset is released automatically.) The software reset is not applied when the bit is changed from 1
to 0.
This bit is the same as the TXEN bit in the mode register described in 3.2.18, which is the bit usually used.
ET1, ET2 (bits 4 and 3)
These bits set the timeout time of the response and idle timers. The following timeout times are the values
applicable when the transfer rate is 2.5 Mbps. (The values become half at 5 Mbps)
ET2,ET1 = 0,0 Response Timer = 1193.6uS Idle Timer = 1312uS MAX Distances = 118.4km
ET2,ET1 = 0,1 Response Timer = 596.8uS Idle Timer = 656uS MAX Distances = 57.6km
ET2,ET1 = 1,0 Response Timer = 298.4uS Idle Timer = 328uS MAX Distances = 28.8km
ET2,ET1 = 1,1 Response Timer = 74.7uS Idle Timer = 82uS MAX Distances = 6.4km
These timeout times must be identical in every node on the network. Refer to the description of the
RCNTM1, 0 bits in the SETUP2 register.
BACKPLAN (bit 2)
This bit selects back plane mode and normal (dipulse) mode; setting 1 to the bit selects back plane mode
and setting 0 selects normal (dipulse) mode. Back plane mode is usually used (default).
COMR7 Register
Seven registers are defined for COMR7, selected by the selection of the SUBAD [3:0] bits of COMR5.
- When reading/writing: ARCNET Tentative ID register
TID [4:0] (bits 4 to 0)
*1 Not equivalent to the ARCNET original specifications. (Reduction in the number of bits).
*1
COMR7-0000
[READ/WRITE]
15-5
4-0
bit
(Tent. ID Register)
Name
--------
TID4-0
DATASHEET
init. value
all "0"
0
Page 71
Description
reserved (all "0")
Tentative Node ID
SUBAD=0000
address:0Eh
Revision 0.1 (06-07-07)

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