DS21Q43-ATN Maxim Integrated Products, DS21Q43-ATN Datasheet - Page 34

IC FRAMER E1 QUAD 5V 128-TQFP

DS21Q43-ATN

Manufacturer Part Number
DS21Q43-ATN
Description
IC FRAMER E1 QUAD 5V 128-TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q43-ATN

Controller Type
E1 Framer
Interface
Parallel/Serial
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
32mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS21Q43-ATN
Manufacturer:
Maxim Integrated
Quantity:
10 000
6.3 Internal Register Scheme Based on CRC4 Multiframe
On the receive side, there is a set of eight registers (RSiAF, RSiNAF, RRA, RSa4 to RSa8) that report the
SI and Sa bits as they are received. These registers are updated with the setting of the Receive CRC4
Multiframe bit in Status Register 2 (SR2.1). The host can use the SR2.1 bit to know when to read these
registers. The user has 2 ms to retrieve the data before it is lost. The MSB of each register is the first
received. Please see the register descriptions below and the Transmit Data Flow diagram in Section 11 for
more details.
On the transmit side, there is also a set of eight registers (TSiAF, TSiNAF, TRA, TSa4 to TSa8) that via
the Transmit Sa Bit Control Register (TSaCR), can be programmed to insert both Si and Sa data. Data is
sampled from these registers with the setting of the Transmit multiframe bit in Status Register 2 (SR2.5).
The host can use the SR2.5 bit to know when to update these registers. It has 2 ms to update the data or
else the old data will be retransmitted. The MSB of each register is the first bit transmitted. Please see the
register descriptions below and the Transmit Data Flow diagram in Section 11 for more details.
REGISTER
RSiNAF
TSiNAF
NAME
RSiAF
TSiAF
RSa4
RSa5
RSa6
RSa7
RSa8
RRA
TSa4
TSa5
TSa6
TSa7
TSa8
TTA
ADDRESS
(HEX)
5A
5D
5B
5C
5E
5F
58
59
50
51
52
53
54
55
56
57
The eight Si bits in the align frame.
The eight Si bits in the non-align frame.
The eight reportings of the receive remote alarm (RA).
The eight Sa4 reported in each CRC4 multiframe.
The eight Sa5 reported in each CRC4 multiframe.
The eight Sa6 reported in each CRC4 multiframe.
The eight Sa7 reported in each CRC4 multiframe.
The eight Sa8 reported in each CRC4 multiframe.
The eight Si bits to be inserted into the align frame.
The eight Si bits to be inserted into the non-align frame.
The eight settings of receive remote alarm (RA).
The eight Sa4 settings in each CRC4 multiframe.
The eight Sa5 settings in each CRC4 multiframe.
The eight Sa6 settings in each CRC4 multiframe.
The eight Sa7 settings in each CRC4 multiframe.
The eight Sa8 settings in each CRC4 multiframe.
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FUNCTION
DS21Q43A

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