ISP1161ABM-S ST-Ericsson Inc, ISP1161ABM-S Datasheet - Page 66

• Manufacturer Part Number: ISP1161ABM-S
• Description: IC USB HOST CTRL FULL-SPD 64LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABM-S

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
Table 36:
9397 750 13962
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcHardwareConfiguration register: bit allocation
EOTInput
Polarity
R/W
R/W
15
0
7
0
10.4.1 HcHardwareConfiguration register (R/W: 20H/A0H)
10.4 HC DMA and interrupt control registers
DACKInput
Code (Hex): 20 — read
Code (Hex): A0 — write
reserved
Table 37:
Bit
15 to 13 -
12
11
10
9
8
7
6
Polarity
1. Bit 0, InterruptPinEnable, is used as pin INT1’s master interrupt enable. This bit
2. Bits 4 and 3 are fixed at logic 0 and logic 1 for the ISP1161A.
R/W
R/W
14
0
6
0
should be used together with the register HcµPInterruptEnable to enable pin
INT1.
Symbol
2_DownstreamPort15Kresistor
Sel
SuspendClkNotStop
AnalogOCEnable
-
DACKMode
EOTInputPolarity
DACKInputPolarity
HcHardwareConfiguration register: bit description
putPolarity
DREQOut
R/W
R/W
13
0
5
1
Rev. 03 — 23 December 2004
streamPort
resistorsel
2_Down
DataBusWidth[1:0]
Full-speed USB single-chip host and device controller
R/W
R/W
15K
12
0
4
0
ClkNotStop
Suspend
Description
reserved
0 — use external 15 kΩ resistors for downstream
ports.
Power-up value
1 — built-in resistors for downstream ports
0 — clock can be stopped
1 — clock can not be stopped
0 — use external OC detection. Digital input
1 — use on-chip OC detection. Analog input
reserved
0 — normal operation. DACK1 is used with read
and write signals. Power-up value
1 — reserved
0 — active LOW. Power-up value
1 — active HIGH
0 — active LOW. Power-up value
1 — reserved
R/W
R/W
11
0
3
1
InterruptOut
AnalogOC
putPolarity
Enable
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
InterruptPi
reserved
nTrigger
ISP1161A
R/W
R/W
9
0
1
0
DACKMode
InterruptPin
Enable
R/W
R/W
65 of 134
8
0
0
0