AD9958BCPZ Analog Devices Inc, AD9958BCPZ Datasheet - Page 15

• Manufacturer Part Number: AD9958BCPZ
• Description: IC DDS DUAL 500MSPS DAC 56LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9958BCPZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) Phase Coherent FSK Modulator (CN0186)
• Resolution (bits): 10 b
• Master Fclk: 500MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 1.71 V ~ 1.96 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Pll Type: Frequency Synthesis
• Frequency: 500MHz
• Supply Current: 105mA
• Supply Voltage Range: 1.71V To 1.89V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 56
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9958/PCBZ - BOARD EVALUATION FOR AD9958
• Lead Free Status / Rohs Status: Compliant

Figure 25. Synchronizing Multiple Devices to Increase Channel Capacity Using the AD9510 as a Clock Distributor for the Reference and SYNC_CLK
Figure 27. Agile Clock Source with Duty Cycle Control Using the Phase Offset Value in DDS to Change the DC Voltage to the Comparator
REFCLK
REFCLK
CENTRAL
CONTROL
AD9958
Figure 26. DDS Providing Stimulus for Acoustic Optical Tunable Filter
AD9958
CH0
CH1
FPGA
FPGA
FPGA
FPGA
SOURCE
CLOCK
CH0
CH1
DELAY EQUALIZATION
SYNCHRONIZATION
SYNC_CLK
SYNC_CLK
SYNC_CLK
DATA
DATA
DATA
DATA
SYNC_CLK
Rev. A | Page 15 of 44
AD9510
ADCMP563
SYNC_IN
+
DELAY EQUALIZATION
–
CLOCK DISTRIBUTOR
AMP
AMP
WDM SIGNAL
SELECTABLE WAVELENGTH FROM EACH
AD9510
WITH
CHANNEL VIA DDS TUNING AOTF
CH0
CH1
REF_CLK
C1
S1
C2
S2
C3
S3
C4
S4
ACOUSTIC OPTICAL
TUNABLE FILTER
AD9958
(MASTER)
AD9958
(SLAVE 1)
AD9958
(SLAVE 2)
AD9958
(SLAVE 3)
SPLITTER
OUTPUTS
CH0 CH1
INPUTS
SYNC_OUT
WITH MULTIPLE DISCRETE
OPTICAL FIBER CHANNEL
WAVELENGTHS
A1
A2
A3
A4
A_END
SOURCE
WDM
AD9958